Back to results
US 10,504,580 B2Granted
Systems and methods for refreshing a memory bank while accessing another memory bank using a shared address path
AssigneeMicron Technology, Inc.
InventorJoosang Lee
Life of this patent
Estimating the term…
Abstract
A system includes first and second sets of memory banks that store data. The system also includes an address path coupled to the memory banks that provides a row address to the memory banks. The system further includes a command address input circuit coupled to the address path. The command address input circuit includes a counter that stores and increments the row address. The system also includes a flip-flop that stores the row address in response to receiving a command to refresh the first set of memory banks.
Claims16
A system comprising:
- a plurality of memory banks configured to store data, wherein the plurality of memory banks comprises a first set of memory banks and a second set of memory banks;
- an address path coupled to the plurality of memory banks, wherein the address path is configured to provide a row address to the plurality of memory banks;
- and
- a command address input circuit coupled to the address path, wherein the command address input circuit comprises:
- a counter configured to store and increment the row address;
- and
- a flip-flop configured to store the row address incremented by the counter in response to receiving a command to refresh the first set of memory banks, wherein the command address input circuit is configured to select the row address stored in the flip-flop and refresh a first row of the first set of memory banks associated with the row address stored in the flip-flop via the address path while activating a second row of the second set of memory banks via the address path.
4 more elements
Dependencies are inferred from the claim text.