Array of programmable memory elements with an array of second circuit elements

A circuit comprising:

• an array of first means for storing fabricated on a substrate, each first means for storing having one or more print-programmable regions which, when processed by an external process in which a material is applied to at least partially cover one or more of the print-programmable regions, are configured to program that first means for storing to one of multiple states;
• a first set of control lines connected to the array of first means for storing, by which the contents of each individual first means for storing are configured to be accessed by control signals applied to a respective combination of at least two control lines in the first set of control lines;
• and
• an array of second means for storing, different from the first means for storing, each second means for storing connected to a control line of the first set of control lines and to another control line of a second set of control lines, different from the first set of control lines, so as to provide access to the second means for storing,
• wherein the second means for storing are interleaved with the first means for storing on the substrate and the second means for storing on the substrate are fabricated underneath the print-programmable regions so as to be at least partially overlapped by the print-programmable regions of the first means for storing.

A method of fabricating a circuit comprising:

• fabricating an array of programmable-memory elements on a substrate, each programmable memory element having one or more print-programmable regions which, when processed by an external process in which a material is applied to at least partially cover one or more of the print-programming regions, are configured to program that programmable memory element to one of multiple states;
• fabricating a first set of control lines connected to the array of programmable memory elements, by which the contents of each individual programmable memory element are configured to be accessed by control signals applied to a respective combination of at least two control lines in the first set of control lines;
• and
• fabricating an array of second circuit elements, different from the programmable memory elements, each connected to a control line of the first set of control lines and to another control line of a second set of control lines, different from the first set of control lines, so as to provide access to second circuit elements in the array;
• wherein the step of fabricating the array of second circuit elements comprises interleaving the array of second circuit elements with the programmable memory elements on the substrate and the second circuit elements on the substrate are fabricated underneath the print-programmable regions so as to be at least partially overlapped by the print-programmable regions of the programmable memory elements.