Systems for voltage regulation using signal buffers and related methods

A voltage regulator comprising:

• an operational amplifier having an output terminal;
• a signal buffer coupled to the output terminal of the operational amplifier, the signal buffer having at least first and second terminals;
• and
• an output transistor having an input terminal and an output terminal, the input terminal of the output transistor being coupled to the first terminal of the signal buffer and the output terminal of the output transistor being coupled to the second terminal of the signal buffer,
• wherein the signal buffer is configured to set a voltage at the input terminal of the output transistor to be substantially equal to a voltage at the output terminal of the output transistor in response to an overshoot in the voltage at the output terminal of the output transistor.

A method for regulating an output voltage provided to a load, the method comprising:

• when the load is accessed, providing the output voltage to the load with a voltage regulator comprising a signal buffer and an output transistor;
• and
• when the load is in an idle mode, regulating the output voltage by clamping, with the signal buffer, a voltage at a gate terminal of the output transistor to the output voltage
• wherein clamping the voltage at the gate terminal of the output transistor to the output voltage comprises causing the voltage at the gate terminal of the output transistor to be substantially equal to the output voltage.