Display apparatus

A display apparatus comprising:

• a first pixel connected to a first scan line, a second scan line, and a first data line;
• a second pixel connected to the first scan line and a second data line;
• a third pixel connected to the second scan line, a third scan line, and the first data line;
• and
• a fourth pixel connected to the second scan line and the second data line,
• a selection circuit configured to electrically connect a first channel to one of the first data line and the second data line in response to selection signals,
• wherein the first pixel comprises:
• a first transistor comprising a first electrode, a second electrode connected to a first node, and a gate electrode connected to the first scan line;
• a first light emitting unit connected to the first node, and configured to receive a first voltage and a second voltage and to emit a light;
• and
• a first switching transistor comprising a first electrode connected to the first data line, a second electrode connected to the first electrode of the first transistor, and a gate electrode connected to the second scan line,
• wherein the third pixel comprises:
• a third transistor comprising a first electrode, a second electrode connected to a third node, and a gate electrode connected to the second scan line;
• a third light emitting unit connected to the third node, and configured to receive a first voltage and a second voltage and to emit a light;
• and
• a third switching transistor comprising a first electrode connected to the first data line, a second electrode connected to the first electrode of the third transistor, and a gate electrode connected to the third scan line,
• wherein each of the first transistor and the first switching transistor is a first type transistor, and each of the third transistor and the third switching transistor is a second type transistor different from the first type transistor.

A display apparatus comprising:

• a selection circuit configured to electrically connect a first channel to one of a first data line and a second data line in response to selection signals;
• a first pixel circuit connected to a first scan line;
• a first switching circuit connected to and between the first data line and the first pixel circuit configured to provide a first data signal, which is provided from the first data line, to the first pixel circuit in response to a second scan signal from a second scan line;
• and
• a second pixel connected to the first scan line and the second data line, wherein a pulse width of a first scan signal configured to be provided to the first scan line and a pulse width of the second scan signal configured to be provided to the second scan line are longer than one horizontal period,
• wherein the first scan signal and the second scan signal are configured to be sequentially activated, and an active period of the first scan signal partially overlaps with an active period of the second scan signal,
• wherein a period, in which the second scan signal configured to be transmitted through the second scan line is inactive and the first scan signal configured to be transmitted through t he first scan line is active, is equal to the one horizontal period.