Electronic circuit design editor with off-screen violation display and correction

A system for viewing and editing an electronic circuit design in accordance with predetermined circuit layout criteria, the system comprising:

• a circuit editor configured to execute on a processor to generate and edit a spatially arranged plurality of circuit elements in an electronic circuit design responsive to user input through a user interface, the circuit editor including a violation detection portion configured to execute to detect an arrangement of circuit elements in violation of predetermined circuit layout criteria;
• and
• a display unit coupled to said circuit editor, said display unit configured to display a graphic rendering of an on-screen portion of the electronic circuit design, an off-screen portion of the electronic circuit design remaining undisplayed;
• wherein the circuit editor is configured to generate for the graphic rendering, based on an arrangement of circuit elements determined to violate the circuit layout criteria including at least one circuit element arranged at least partially in the off-screen portion of the electronic circuit design, both a first visual indication of the violation and a second visual indication of a rearrangement scheme for at least one circuit element to thereby guide user correction of the layout violation, the at least one circuit element arranged at least partially in the off-screen portion being at least partially undisplayed as being outside the visual canvas, the first and second visual indications being displayed within the on-screen portion of the electronic circuit design.

A method of viewing and editing an electronic circuit design, the circuit design having a plurality of circuit elements positioned and interconnected according to a predetermined set of circuit layout criteria, the method comprising:

• defining a visual canvas on a display unit;
• executing a processor to generate a graphic rendering of the electronic circuit design responsive to user input through a user interface;
• displaying the graphic rendering for a first portion of the electronic circuit design within the visual canvas of the display unit, a second portion of the electronic circuit design remaining undisplayed outside the visual canvas;
• executing a processor to detect a layout violation indicating aberrant arrangement of one or more circuit elements relative to the other circuit elements in a manner inconsistent with the circuit layout criteria, the layout violation involving at least one circuit element that is at least partially undisplayed as being at least partially in the second portion of the electronic circuit design, the aberrant arrangement occurring outside the visual canvas;
• executing a processor to form a rearrangement scheme for at least one circuit element to restore consistency with the circuit layout criteria;
• and
• executing a processor to generate on the visual canvas for the detected layout violation both a first visual indication of the layout violation and a second visual indication of the rearrangement scheme for guiding user correction of the layout violation, the first and second visual indications being displayed within the first portion of the electronic circuit design.