Phase algebra for specifying clocks and modes in hierarchical designs
AssigneeInternational Business Machines Corporation
InventorsGabor Drasny, Gavin B Meil
Life of this patent
Estimating the term…
Loading patent…
AssigneeInternational Business Machines Corporation
InventorsGabor Drasny, Gavin B Meil
Estimating the term…
A design tool can implement phase algebra based design evaluation to evaluate a circuit design with a compact representation of waveforms without simulating the individual waveforms. The tool can determine a first sequence of signal transition representations of a first signal of a first module of a register level circuit design. The second module of the register level circuit design comprises the first module, arranged in a hierarchical order. The tool can determine a second sequence of signal transition representations of the first signal of the first module. The signal transition representations of a second signal are propagated from the second module to the first module using the first signal. The tool can determine whether a first mapping can be determined between the first sequence and the second sequence, where the second sequence is propagated through the first module.
A computer-implemented method for evaluating a circuit design using an evaluation tool, the method comprising:
A computer program product for evaluating a circuit design, the computer program product comprising:
Dependencies are inferred from the claim text.