Multiple uplink port devices
AssigneeIntel Corporation
InventorsDebendra Das Sharma, Anil Vasudevan, David Harriman
Life of this patent
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Abstract
A device is provided with two or more uplink ports to connect the device via two or more links to one or more sockets, where each of the sockets includes one or more processing cores, and each of the two or more links is compliant with a particular interconnect protocol. The device further includes I/O logic to identify data to be sent to the one or more processing cores for processing, determine an affinity attribute associated with the data, and determine which of the two or more links to use to send the data to the one or more processing cores based on the affinity attribute.
Claims20
An apparatus comprising:
- a device comprising two or more uplink ports to connect the device via two or more multi-lane links to one or more sockets, wherein the device comprises an endpoint device, each of the sockets comprises one or more processing cores, each of the two or more links is compliant with a particular interconnect protocol, a first one of the two or more uplink port supports a maximum data rate defined for a multi-lane link operating at a defined link width of the particular interconnect protocol, a second one of the two or more uplink port supports the maximum data rate for the multi-lane link operating at the defined link width, and the device is configured to communicate data at greater than the maximum data rate;
- and
- input/output (I/O) logic to:
- identify data to be sent to the one or more processing cores for processing;
- determine an affinity attribute associated with the data;
- and
- determine which of the two or more links to use to send the data to the one or more processing cores based on the affinity attribute.
A system comprising:
- memory;
- a processor;
- an operating system;
- a first instance of a particular driver, wherein the particular driver is for a device of a particular type and the first instance of the particular driver is assigned to a first interconnect link to connect the processor to a particular instance of the device;
- a second instance of the particular driver, wherein the second instance of the particular driver is assigned to a second interconnect link to connect the processor to the particular instance of the device, wherein the particular instance of the device comprises two or more uplink ports, the first instance of the particular driver is designated as a principal instance, and the operating system communicates with the particular instance of the device using the first instance of the particular driver.
A system comprising:
- a processor comprising a plurality of sockets, wherein each socket comprises one or more processing cores and the plurality of sockets are interconnected by one or more interprocessor links;
- and
- an endpoint device comprising two or more uplink ports to connect the endpoint device via two or more multi-lane links to two or more of the plurality of sockets, wherein each of the two or more links is compliant with a particular interconnect protocol, a first one of the two or more uplink ports supports a maximum data rate defined for a multi-lane link operating at a defined link width of the particular interconnect protocol, a second one of the two or more uplink ports supports the maximum data rate for the multi-lane link operating at the defined link width, wherein the device is configured to communicate data at greater than the maximum data rate and the endpoint device comprises port policy logic to:
- identify data to be sent to the processor for processing;
- and
- determine which of the two or more links to use to send the data according to one or more policies, wherein the one or more policies are to attempt to minimize routing of the data over the one or more interprocessor links.
Dependencies are inferred from the claim text.