DIMM SSD Addressing performance techniques
AssigneeSamsung Electronics Co., Ltd.
InventorsCraig Hanson, Ian Swarbrick, Michael Bekerman, Chihjen Chang
Life of this patent
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Abstract
A Non-Volatile Dual In-Line Memory Module is disclosed (NVDIMM). The NVDIMM may be installed in a Dual In-Line Memory Module (DIMM) docket. The NVDIMM may include a non-volatile memory. A device driver may intercept a request for a memory address destined for a host memory controller, replace the memory address with a pre-mapped memory address or an alias of the pre-mapped memory address, and send the pre-mapped memory address to the host memory controller, so that the host memory controller generates a target memory address to NVDIMM.
Claims9
A device, comprising:
- a Non-Volatile Dual In-Line Memory Module (NVDIMM) installed in a Dual In-Line Memory Module (DIMM) socket, the NVDIMM including a memory and an exposed memory, the exposed memory including a first size of the exposed memory and a base address of the exposed memory;
- and
- a device driver operating on a host processor, the device driver operative to intercept a memory address destined for a host memory controller and replace the memory address with an intermediate address in a request sent to the host memory controller, the intermediate address different from the memory address and generated using a physical-to-intermediate mapping on the memory address,
- wherein the exposed memory includes a directly addressable memory and the memory address is in the exposed memory.
A method, comprising:
- receiving a request to access a memory address of a Non-Volatile Dual In-Line Memory Module (NVDIMM), the NVDIMM including a memory and an exposed memory, the exposed memory including a first size of the exposed memory and a base address of the exposed memory the memory address in the exposed memory;
- pre-mapping the memory address to an intermediate address using a physical-to-intermediate transformation, the intermediate address different from the memory address responsive to a first size of an exposed memory in the NVDIMM, and a base address of the exposed memory in the NVDIMM, a second size of a logical segment of the exposed memory in the NVDIMM, a memory controller operating mode of the host memory controller, and a logical-to-physical transformation used by the host memory controller;
- and
- sending the intermediate address to a host memory controller,
- wherein the host memory controller sends a target memory address to the NVDIMM, the target memory address responsive to the intermediate address and representing a physical location of a value stored at the memory address, and
- wherein the exposed memory includes a directly addressable memory.
An article, comprising a non-transitory storage medium, the tangible storage medium having stored thereon instructions that, when executed by a machine, result in:
- receiving a request to access a memory address of a Non-Volatile Dual In-Line Memory Module (NVDIMM), the NVDIMM including a memory and an exposed memory, the exposed memory including a first size of the exposed memory and a base address of the exposed memory, the memory address in the exposed memory;
- pre-mapping the memory address to an intermediate address using a physical-to-intermediate transformation, the intermediate address different from the memory address responsive to a first size of an exposed memory in the NVDIMM, and a base address of the exposed memory in the NVDIMM, a second size of a logical segment of the exposed memory in the NVDIMM, a memory controller operating mode of the host memory controller, and a logical-to-physical transformation used by the host memory controller;
- and
- sending the intermediate address to a host memory controller,
- wherein the host memory controller sends a target memory address to the NVDIMM, the target memory address responsive to the intermediate address and including a physical location of a value stored at the memory address, and
- wherein the exposed memory includes a directly addressable memory.
Dependencies are inferred from the claim text.