Cache coherence with functional address apertures

An apparatus comprising:

• a processing system comprising a memory;
• one or more aperture cache coherency (ACC) blocks configured to:
• monitor accesses to the memory using aliased addresses, wherein the aliased addresses map to locations in an aliased address domain of the memory;
• monitor accesses to the memory through a functional address aperture using aperture addresses, wherein a function of the aperture addresses map to locations in an aperture address domain of the memory;
• and
• maintain coherency between one or more of:
• data in a first location of the memory, the first location belonging to the aliased address domain and the aperture address domain;
• or
• one or more copies of the data accessed using the aperture addresses.

A non-transitory computer-readable storage medium comprising code, which, when executed by a processor, performs operations for managing coherency in a processing system, the non-transitory computer-readable storage medium comprising:

• code for monitoring accesses to a memory using aliased addresses, wherein the aliased addresses map to locations in an aliased address domain of the memory;
• code for monitoring accesses to the memory through a functional address aperture using aperture addresses, wherein a function of the aperture addresses map to locations in an aperture address domain of the memory;
• and
• code for maintaining coherency between one or more of:
• data in a first location of the memory, the first location belonging to the aliased address domain and the aperture address domain;
• or
• one or more copies of the data accessed using the aperture addresses.

An apparatus comprising:

• means for monitoring accesses to a memory in a processing system, using aliased addresses, wherein the aliased addresses map to locations in an aliased address domain of the memory;
• means for monitoring accesses to the memory through a functional address aperture using aperture addresses, wherein a function of the aperture addresses map to locations in an aperture address domain of the memory;
• and
• means for maintaining coherency between one or more of:
• data in a first location of the memory, the first location belonging to the aliased address domain and the aperture address domain;
• or
• one or more copies of the data accessed using the aperture addresses.