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US 10,503,642 B2Granted
Cache coherence directory architecture with decoupled tag array and data array
AssigneesHuawei Technologies Co., Ltd., National University of Singapore
InventorsYuan Yao, Tulika Mitra, Zhiguo Ge, Naxin Zhang
Life of this patent
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Abstract
A data processing method includes allocating a tag entry in a tag array for a data block; allocating a data entry in a data array for the data block when the data block is actively shared; and de-allocating the data entry when the data block is temporarily private or gets evicted in the data array.
Claims10
A data processing method for a cache coherence directory architecture, the method comprising:
- allocating, by a data processing device, a tag entry in a tag array for a data block;
- allocating, by the data processing device, a data entry in a data array for the data block when the data block is actively shared, wherein the data block being actively shared corresponds to the data block being cached by at least two cores;
- and
- de-allocating, by the data processing device, the data entry when the data block is temporarily private or gets evicted in the data array, wherein the data block being temporarily private corresponds to the data block being cached by only one core;
- wherein the tag array and the data array are decoupled, wherein data entries of the data array are only allocated to actively shared data blocks, and wherein data blocks that are temporarily private only have tag entries but not data entries allocated thereto.
2 more elements
A data processing device for a cache coherence directory architecture, the device comprising:
- a cache, comprising a tag array and a data array;
- and
- a processor, configured to
- allocate a tag entry in the tag array for a data block;
- allocate a data entry in the data array for the data block when the data block is actively shared, wherein the data block being actively shared corresponds to the data block being cached by at least two cores;
- and
- de-allocate the data entry when the data block is temporarily private or gets evicted in the data array, wherein the data block being temporarily private corresponds to the data block being cached by only one core;
- wherein the tag array and the data array are decoupled, wherein data entries of the data array are only allocated to actively shared data blocks, and wherein data blocks that are temporarily private only have tag entries but not data entries allocated thereto.
5 more elements
Dependencies are inferred from the claim text.