Apparatus and method for accessing data in a cache in response to an unaligned load instruction

An apparatus comprising:

• load circuitry to detect an unaligned load instruction for loading from a cache an unaligned block of data which is unaligned with respect to data word boundaries of the cache, and in response to detecting the unaligned load instruction, to trigger a series of load operations for loading corresponding portions of the unaligned block of data from respective data words of the cache, the series of load operations comprising an initial load operation for loading an initial portion of the unaligned block of data and at least one subsequent load operation for loading at least one subsequent portion of the unaligned block of data;
• wherein:
• the load circuitry has a first unaligned load handling mode in which the load circuitry is configured to trigger a final load operation of said series to load a full data word from the cache, and to store in a stream buffer an excess part of said full data word that extends beyond the unaligned block of data;
• in response to a subsequent unaligned load instruction for which said initial portion of the unaligned block of data corresponds to said excess part for a preceding unaligned load instruction, the load circuitry is configured to suppress said initial load operation of the series of load operations for said subsequent unaligned load instruction;
• in the first unaligned load handling mode, the load circuitry is configured to store a stream buffer identifier indicative of an address of the excess part;
• in response to the subsequent unaligned load instruction, the load circuitry is configured to determine whether said initial portion of the unaligned block of data corresponds to said excess part for the preceding unaligned load instruction based on the stream buffer identifier;
• the unaligned load instruction comprises a base register identifier identifying a base register storing a base address and identifies an offset of a target address relative to said base address;
• said stream buffer identifier comprises said base register identifier and said offset;
• in response to a first type of unaligned load instruction, the load circuitry is configured to update the base register to store said target address;
• and
• in response to the subsequent unaligned load instruction when the preceding unaligned load instruction is of the first type, the load circuitry is configured to determine that said initial portion of the unaligned block of data corresponds to said excess part for a preceding unaligned load instruction when the subsequent unaligned load instruction identifies the same base register and offset as said stream buffer identifier.

A data processing method comprising:

• in response to an unaligned load instruction for loading from a cache an unaligned block of data which is unaligned with respect to data word boundaries of the cache, triggering a series of load operations for loading corresponding portions of the unaligned block of data from respective data words of the cache, the series of load operations comprising an initial load operation for loading an initial portion of the unaligned block of data and at least one subsequent load operation for loading at least one subsequent portion of the unaligned block of data;
• and
• wherein in a first unaligned load handling mode, a final load operation of said series loads a full data word from the cache and stores in a stream buffer an excess part of said full data word that extends beyond the unaligned block of data;
• and
• in response to a subsequent unaligned load instruction for which said initial portion of the unaligned block of data corresponds to said excess part for a preceding unaligned load instruction, suppressing said initial load operation of the series of load operations for said subsequent unaligned load instruction;
• in a second unaligned load handling mode, triggering said final load operation of said series to load from the cache a partial data word entirely within the unaligned block of data;
• and
• selecting whether the load circuitry operates in the first unaligned load handling mode or the second unaligned load handling mode in dependence on monitoring of previous unaligned load instructions.