Event-driven design simulation

A method for testing a design by operating a testbench for the design, the method comprising:

• executing an operating system at a simulation processor;
• using the operating system to retrieve compiled design data from a host computing system to a simulation storage, the compiled design data comprising compiled register transfer levels (RTLs) of the design and compiled models of the testbench, wherein the compiled RTLs comprise instructions that are executable at a plurality of hardware computing resources in a simulation accelerator, wherein the instructions are divided into a plurality of groups of instructions;
• executing the compiled models at the simulation processor to generate stimulus for testing the compiled RTLs;
• and
• executing, at the simulation accelerator, the compiled RTLs by using the stimulus generated by the simulation processor as input, wherein the instructions of each group of instructions of the compiled RTLs are distributed to the plurality of hardware computing resources to be executed in parallel and in any order.