Scalable low-latency storage interface
AssigneeMicron Technology, Inc.
InventorsEdward McGlaughlin, Yves Tchapda, Stephen Marshall, Samuel Bradshaw, Niels Reimers
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AssigneeMicron Technology, Inc.
InventorsEdward McGlaughlin, Yves Tchapda, Stephen Marshall, Samuel Bradshaw, Niels Reimers
Estimating the term…
Systems and methods are disclosed, including a host interface circuit configured to control communication between a set of virtual functions (VFs) and a media management system (MMS). The host interface circuit can consolidate commands from the set of VFs, dynamically allocate write buffers (WBs) from a set of available WBs to the set of VFs using the commands, and manage WB access for the set of VFs and provide write data to the MMS using the allocated WBs. For each VF in the set of VFs, the host interface circuit can manage a submission queue (SQ) for a respective VF from the set of VFs, receive a command from the respective VF, including one or more submission queue entries (SQEs), and coordinate the one or more received SQEs with allocated WBs.
A system comprising:
A method to control communication between a set of virtual functions (VB) and a media management system (MMS), the method comprising:
At least one non-transitory machine-readable medium including instructions that, when executed by processing circuitry of a host interface circuit, cause the host interface circuit to control communication between a set of virtual functions (VFs) and a media management system (MMS), including to:
Dependencies are inferred from the claim text.