Voltage regulator and method for compensating the effects of an output impedance

A method for compensating and/or reducing effects of a parasitic inductance at an output of a voltage regulator;

• wherein the voltage regulator is configured to provide an output current at an output voltage at an output node of the voltage regulator, based on an input voltage at an input node of the voltage regulator;
• wherein the output node of the voltage regulator is coupled to an output capacitor via a conductive path that exhibits the parasitic inductance;
• wherein the voltage regulator comprises an output amplification stage for deriving the output current at the output node from the input voltage at the input node in dependence of a drive voltage at an intermediate node of the voltage regulator;
• wherein the voltage regulator comprises an intermediate amplification stage for providing the drive voltage at the intermediate node based on a differential output voltage, wherein the intermediate amplification stage exhibits an amplification bandwidth;
• and wherein the voltage regulator comprises a differential amplification stage configured to determine the differential output voltage in dependence of the output voltage and in dependence of a reference voltage;
• wherein the method comprises
• determining a load indication which is indicative of the output current;
• and
• setting an impedance at the intermediate node based on the load indication such that:
• i. the amplification bandwidth is reduced, if the load indication indicates a relatively high output current;
• and
• the amplification bandwidth remains unaffected, if the load indication indicates a relatively low output current.

A voltage regulator configured to provide an output current at an output voltage at an output node of the voltage regulator, based on an input voltage at an input node of the voltage regulator;

• wherein the output node of the voltage regulator is coupled to an output capacitor via a conductive path that exhibits a parasitic inductance;
• wherein the voltage regulator comprises,
• an output amplification stage for deriving the output current at the output node from the input voltage at the input node in dependence of a drive voltage at an intermediate node of the voltage regulator;
• an intermediate amplification stage for providing the drive voltage at the intermediate node based on a differential output voltage, wherein the intermediate amplification stage exhibits a pole;
• a differential amplification stage configured to determine the differential output voltage in dependence of the output voltage and in dependence of a reference voltage;
• a sensing unit configured to provide a load indication which is indicative of the output current;
• and
• a variable impedance coupled to the intermediate node;
• wherein the variable impedance is dependent on the load indication, wherein the variable impedance is such that
• a frequency of the pole is reduced, if the load indication indicates a relatively high output current;
• and
• the frequency of the pole remains unaffected, if the load indication indicates a relatively low output current.

A voltage regulator configured to provide an output current at an output voltage at an output node of the voltage regulator, based on an input voltage at an input node of the voltage regulator;

• wherein the output node of the voltage regulator is coupled to an output capacitor via a conductive path that exhibits a parasitic inductance, wherein the output capacitor and the parasitic inductance form an LC circuit with an LC resonance frequency;
• wherein the voltage regulator comprises,
• an output amplification stage for deriving the output current at the output node from the input voltage at the input node in dependence of a drive voltage at an intermediate node of the voltage regulator;
• an intermediate amplification stage for providing the drive voltage at the intermediate node based on a differential output voltage;
• a differential amplification stage configured to determine the differential output voltage in dependence of the output voltage and in dependence of a reference voltage;
• a sensing unit configured to provide a load indication which is indicative of the output current;
• and
• a variable impedance coupled to the intermediate node;
• wherein the variable impedance is dependent on the load indication;
• Wherein
• the voltage regulator excluding the variable impedance exhibits a bandwidth and/or a gain bandwidth frequency which increases with increasing output current, such that for an output current at or above a threshold current the LC resonance frequency falls within the bandwidth and/or is smaller than the gain bandwidth frequency;
• and
• the variable impedance is such that for the voltage regulator including the variable impedance
• the LC resonance frequency is higher than the bandwidth and/or the gain bandwidth frequency of the voltage regulator at an output current at or above the threshold current;
• and
• the bandwidth and/or the gain bandwidth frequency of the voltage regulator including the variable impedance corresponds to the bandwidth and/or the gain bandwidth frequency of the voltage regulator excluding the variable impedance for an output current below the threshold current.

A voltage regulator configured to provide an output current at an output voltage at an output node of the voltage regulator, based on an input voltage at an input node of the voltage regulator;

• wherein the output node of the voltage regulator is coupled to an output capacitor via a conductive path that exhibits a parasitic inductance, wherein the output capacitor and the parasitic inductance form an LC circuit with an LC resonance frequency;
• wherein the voltage regulator comprises,
• an output amplification stage for deriving the output current at the output node from the input voltage at the input node in dependence of a drive voltage at an intermediate node of the voltage regulator;
• an intermediate amplification stage for providing the drive voltage at the intermediate node based on a differential output voltage;
• a differential amplification stage configured to determine the differential output voltage in dependence of the output voltage and in dependence of a reference voltage;
• a sensing unit configured to provide a load indication which is indicative of the output current;
• and
• a variable impedance coupled to the intermediate node;
• wherein the variable impedance is dependent on the load indication;
• wherein
• the voltage regulator excluding the variable impedance has a frequency-dependent open loop gain for an output current at or above a threshold current, which exhibits a peak around the LC resonance frequency;
• and
• the variable impedance is such that the open loop gain of the voltage regulator including the variable impedance
• exhibits a reduced peak or no peak around the LC resonance frequency for an output current at or above the threshold current;
• and
• corresponds to the open loop gain of the voltage regulator excluding the variable impedance for an output current below the threshold current.

A method for compensating and/or reducing effects of a parasitic inductance at an output of a voltage regulator;

• wherein the voltage regulator is configured to provide an output current at an output voltage at an output node of the voltage regulator, based on an input voltage at an input node of the voltage regulator;
• wherein the output node of the voltage regulator is coupled to an output capacitor via a conductive path that exhibits the parasitic inductance;
• wherein the voltage regulator comprises an output amplification stage for deriving the output current at the output node from the input voltage at the input node in dependence of a drive voltage at an intermediate node of the voltage regulator;
• wherein the voltage regulator comprises an intermediate amplification stage for providing the drive voltage at the intermediate node based on a differential output voltage, wherein the intermediate amplification stage exhibits a pole;
• and wherein the voltage regulator comprises a differential amplification stage configured to determine the differential output voltage in dependence of the output voltage and in dependence of a reference voltage;
• wherein the method comprises
• determining a load indication which is indicative of the output current;
• and
• setting an impedance at the intermediate node based on the load indication such that:
• a frequency of the pole is reduced, if the load indication indicates a relatively high output current;
• and
• the frequency of the pole remains unaffected, if the load indication indicates a relatively low output current.

A method for compensating and/or reducing effects of a parasitic inductance at an output of a voltage regulator;

• wherein the voltage regulator is configured to provide an output current at an output voltage at an output node of the voltage regulator, based on an input voltage at an input node of the voltage regulator;
• wherein the output node of the voltage regulator is coupled to an output capacitor via a conductive path that exhibits the parasitic inductance, wherein the output capacitor and the parasitic inductance form an LC circuit with an LC resonance frequency;
• wherein the voltage regulator comprises an output amplification stage for deriving the output current at the output node from the input voltage at the input node in dependence of a drive voltage at an intermediate node of the voltage regulator;
• wherein the voltage regulator comprises an intermediate amplification stage for providing the drive voltage at the intermediate node based on a differential output voltage;
• and wherein the voltage regulator comprises a differential amplification stage configured to determine the differential output voltage in dependence of the output voltage and in dependence of a reference voltage;
• wherein the method comprises
• determining a load indication which is indicative of the output current;
• and
• setting an impedance at the intermediate node based on the load indication;
• wherein
• the voltage regulator excluding the variable impedance exhibits a bandwidth and/or a gain bandwidth frequency which increases with increasing output current, such that for an output current at or above a threshold current the LC resonance frequency falls within the bandwidth and/or is smaller than the gain bandwidth frequency;
• and
• the variable impedance is such that for the voltage regulator including the variable impedance
• the LC resonance frequency is higher than the bandwidth and/or the gain bandwidth frequency of the voltage regulator at an output current at or above the threshold current;
• and
• the bandwidth and/or the gain bandwidth frequency of the voltage regulator including the variable impedance corresponds to the bandwidth and/or the gain bandwidth frequency of the voltage regulator excluding the variable impedance for an output current below the threshold current.

A method for compensating and/or reducing effects of a parasitic inductance at an output of a voltage regulator;

• wherein the voltage regulator is configured to provide an output current at an output voltage at an output node of the voltage regulator, based on an input voltage at an input node of the voltage regulator;
• wherein the output node of the voltage regulator is coupled to an output capacitor via a conductive path that exhibits the parasitic inductance, wherein the output capacitor and the parasitic inductance form an LC circuit with an LC resonance frequency;
• wherein the voltage regulator comprises an output amplification stage for deriving the output current at the output node from the input voltage at the input node in dependence of a drive voltage at an intermediate node of the voltage regulator;
• wherein the voltage regulator comprises an intermediate amplification stage for providing the drive voltage at the intermediate node based on a differential output voltage;
• and wherein the voltage regulator comprises a differential amplification stage configured to determine the differential output voltage in dependence of the output voltage and in dependence of a reference voltage;
• wherein the method comprises
• determining a load indication which is indicative of the output current;
• and
• setting an impedance at the intermediate node based on the load indication;
• wherein
• the voltage regulator excluding the variable impedance has a frequency-dependent open loop gain for an output current at or above a threshold current, which exhibits a peak around the LC resonance frequency;
• and
• the variable impedance is such that the open loop gain of the voltage regulator including the variable impedance
• exhibits a reduced peak or no peak around the LC resonance frequency for an output current at or above the threshold current;
• and
• corresponds to the open loop gain of the voltage regulator excluding the variable impedance for an output current below the threshold current.