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US 10,484,718 B2Granted
Memory having memory cell string and coupling components
AssigneeMicron Technology, Inc.
InventorToru Tanzawa
Life of this patent
Estimating the term…
Abstract
Some embodiments include apparatuses and methods having a conductive line, a memory cell string including memory cells located in different levels the apparatus, and a select circuit including a select transistor and a coupling component coupled between the conductive line and the memory cell string. Other embodiments including additional apparatuses and methods are described.
Claims20
A method comprising:
- turning on a select transistor coupled between a conductive line and a memory cell string of a device during a first time interval and a second time interval of a first operation of the device if a memory cell of the memory cell string is selected to store information in the first operation;
- turning on the select transistor during a portion of a first time interval of a second operation if no memory cells of the memory string are selected to store information in the second operation;
- and
- turning off the select transistor during a second time interval of the second operation if no memory cells of the memory string are selected to store information in the second operation.
1 more element
A method comprising:
- providing a first voltage having a positive value to a gate of a select transistor coupled between a conductive line and a memory cell string of a device during a first time interval and a second time interval of a first write operation of the device if a memory cell the memory cell string is selected to store information in the first write operation;
- providing a second voltage having a positive value to the gate of the select transistor during a portion of the first time interval of a second write operation of the device if no memory cells of the memory string are selected to store information in the second write operation;
- and
- providing ground potential to the gate of the select transistor during a second time interval of the second write operation if no memory cells of the memory string are selected to store information in the second write operation.
1 more element
A method comprising:
- providing a first voltage having a positive value to a gate of a select transistor coupled between a conductive line and a memory cell string of a device during a first time interval and a second time interval of a first write operation of the device if a memory cell the memory cell string is selected to store information in the first write operation;
- providing a second voltage having a positive value to the gate of the select transistor during a portion of the first time interval of a second write operation of the device if no memory cells of the memory string are selected to store information in the second write operation;
- providing ground potential to the gate of the select transistor during a second time interval of the second write operation if no memory cells of the memory string are selected to store information in the second write operation;
- and
- providing, during the first write operation, a voltage having a positive value to a control line coupled to a coupling component, the coupling component coupled between the select transistor and the memory cell string.
2 more elements
Dependencies are inferred from the claim text.