Method and apparatus for encoding processing blocks of a frame of a sequence of video frames using skip scheme

An image transmission system for transmitting a sequence of frames of video data, each frame comprising a plurality of processing blocks, the system comprising:

• a communication channel;
• a video encoding apparatus comprising;
• a skip decision circuit for generating a control signal according to a block type, a similarity checking result and a comparison result between a first quantization parameter for a first processing block from a current frame and a second quantization parameter for a second processing block from a previous frame;
• and
• an encoder for encoding a third processing block to generate a first encoded bit stream and the first quantization parameter, wherein the third processing block is one of the first processing block and a residual;
• a transmitter for transforming a first formatted bit stream into data packets and transmitting the data packets over the communication channel;
• a receiver for receiving the data packets and transforming the data packets into a second formatted bit stream;
• a video decoding apparatus comprising a reference buffer and a difference buffer for separating the second formatted bit stream into a second encoded bit stream, a second skip flag and a second type flag and for reconstructing a fifth processing block from at least one of the second encoded bit stream, the reference buffer and the difference buffer according to the second skip flag and the second type flag;
• wherein the second processing block resides at the same location in the previous frame as the first processing block in the current frame;
• wherein the video decoding apparatus comprises:
• a parser for separating the second formatted bit stream into the second encoded bit stream, the second skip flag and the second type flag;
• a storage and selection output circuit having an input terminal, a first output terminal and a second output terminal, comprising:
• the difference buffer;
• the reference buffer;
• and
• a selection output circuit connected to the difference buffer and the reference buffer for determining whether to transfer input data from the input terminal to one of the difference buffer and the reference buffer, whether to transfer one of the input data and a portion of the difference buffer to the first output terminal, and whether to output a portion of the reference buffer to the second output terminal according to the second skip flag and the second type flag;
• a decoding device connected to either the input terminal or the first and the second output terminals;
• and
• an adder whose first and second input terminals are connected to either the first and the second output terminals of the storage and selection output circuit or an output terminal of the decoding device;
• wherein the decoding device comprises a first decoder and a second decoder, wherein the first decoder is connected between the first output terminal of the storage and selection output circuit and the first input terminal of the adder, and the second decoder is connected between the second output terminal of the storage and selection output circuit and the second input terminal of the adder.

An image transmission system for transmitting a sequence of frames of video data, each frame comprising a plurality of processing blocks, the system comprising:

• a communication channel;
• a video encoding apparatus comprising;
• a skip decision, circuit for generating a control signal according to a block type, a similarity checking result and a comparison result between a first quantization parameter for a first processing block from a current frame and a second quantization parameter for a second processing block from a previous frame;
• and
• an encoder for encoding a third processing block to generate a first encoded bit stream and the first quantization parameter, wherein the third processing block is one of the first processing block and a residual;
• a transmitter for transforming a first formatted bit stream into data packets and transmitting the data packets over the communication channel;
• a receiver for receiving the data packets and transforming the data packets into a second formatted bit stream;
• a video decoding apparatus comprising a reference buffer and a difference buffer for separating the second formatted bit stream into a second encoded bit stream, a skip flag and a type flag and for reconstructing a fifth processing block from at least one of the second encoded bit stream, the reference buffer and the difference buffer according to the skip flag and the type flag;
• wherein the second processing block resides at the same location in the previous frame as the first processing block in the current frame;
• wherein the video decoding apparatus comprises:
• a parser for separating the second formatted bit stream into the second encoded bit stream, the skip flag and the type flag;
• a storage and selection output circuit having an input terminal, a first output terminal and a second output terminal, comprising:
• the difference buffer;
• the reference buffer;
• and
• a selection output circuit connected to the difference buffer and the reference buffer for determining whether to transfer input data from the input terminal to one of the difference buffer and the reference buffer, whether to transfer one of the input data and a portion of the difference buffer to the first output terminal, and whether to output a portion of the reference buffer to the second output terminal according to the skip flag and the type flag;
• a decoding device connected to either the input terminal or the first and the second output terminals;
• and
• an adder whose first and second input terminals are connected to either the first and the second output terminals of the storage and selection output circuit or an output terminal of the decoding device;
• wherein the decoding device is connected between the parser and the input terminal of the storage and selection output circuit, and the two input terminals of the adder are respectively connected to the two output terminals of the storage and selection output circuit;
• wherein the selection output circuit transfers the portion of the difference buffer to the first input terminal of the adder and a portion of the reference buffer to the second input terminal of the adder if the skip flag indicates the fifth processing block is skipped and the type flag is forward predictive-coded, wherein the selection output circuit transfers the portion of the reference buffer to the second input terminal of the adder if the skip flag indicates the fifth processing block is skipped and the type flag is intra-coded, wherein the selection output circuit transfers the input data to the first input terminal of the adder and the reference buffer if the skip flag indicates the fifth processing block is not skipped and the type flag is intra-coded, and wherein the selection output circuit transfers the input data to both the first input terminal of the adder and the difference buffer and transfers the portion of the reference buffer to the second input terminal of the adder if the skip flag indicates the fifth processing block is not skipped and the type flag is forward predictive-coded.