Gate driving circuit and display device
AssigneeWuhan China Star Optoelectronics Technology Co., Ltd.
InventorYafeng Li
Life of this patent
Estimating the term…
Abstract
Disclosed is a gate driving circuit and a display device, which solve the technical problem that the prior art is easy to cause abnormal output of gate driving signals. The gate driving circuit includes a precharge unit circuit, an output unit circuit, and a holding unit circuit. The output unit circuit includes a first reference point and a clock signal line. The holding unit circuit includes a second reference point and a holding signal line, and a holding capacitor is connected between the second reference point and the holding signal line.
Claims15
A gate driving circuit, comprising a precharge unit circuit, an output unit circuit, and a holding unit circuit, wherein:
- the output unit circuit comprises a first reference point and a clock signal line;
- the holding unit circuit comprises a second reference point and a holding signal line, and a holding capacitor is connected between the second reference point and the holding signal line;
- before an output period, the precharge unit circuit outputs a high level to the first reference point;
- during the output period, the first reference point is maintained at a high level, and the clock signal line outputs a high level to cause the output unit circuit to output a scanning signal to a scan line;
- after the output period, the holding signal line outputs a periodic high level to the second reference point through the holding capacitor, so that the first reference point is maintained at a low level;
- wherein the holding unit circuit further comprises a low-level signal line, a fourth switch tube, and a second capacitor, wherein a gate of the fourth switch tube is connected to the second reference point, a source thereof is connected to the low-level signal line, and a drain thereof is connected to the scan line;
- and wherein the second capacitor is connected between the second reference point and the low-level signal line.
A display device, comprising a plurality of cascaded gate driving circuits each of which comprises a precharge unit circuit, an output unit circuit, and a holding unit circuit, wherein:
- the output unit circuit comprises a first reference point and a clock signal line;
- the holding unit circuit comprises a second reference point and a holding signal line, and a holding capacitor is connected between the second reference point and the holding signal line;
- before an output period, the precharge unit circuit outputs a high level to the first reference point;
- during the output period, the first reference point is maintained at a high level, and the clock signal line outputs a high level to cause the output unit circuit to output a scanning signal to a scan line;
- after the output period, the holding signal line outputs a periodic high level to the second reference point through the holding capacitor, so that the first reference point is maintained at a low level;
- where the holding unit circuit further comprises a low-level signal line, a fourth switch tube, and a second capacitor, wherein a gate of the fourth switch tube is connected to the second reference point, a source thereof is connected to the low-level signal line, and a drain thereof is connected to the scan line;
- and wherein the second capacitor is connected between the second reference point and the low-level signal line.
Dependencies are inferred from the claim text.