Address verification on a bus

An apparatus for address verification on a bus, the bus connecting a plurality of receiving bus nodes and one or more sending bus nodes, the bus providing communication among the bus nodes, the apparatus comprising a receiving bus node configured to perform the steps of:

• receiving, by a receiving bus node over the bus, a parity signal and an address signal, the address signal identifying an address of a target receiving bus node, wherein the receiving bus node first receives the address signal as a plurality of bits on a signal line of the bus and, immediately following the address signal, receives the parity signal as at least one bit on the same signal line;
• determining, by the receiving bus node, whether the address of the target receiving bus node matches an address of the receiving bus node;
• responsive to determining that the address of the target receiving bus node matches the address of the receiving bus node, determining, by the receiving bus node, whether the parity signal is an expected parity signal, wherein values of the parity signal and the expected parity signal are determined based on an address of a corresponding receiving bus node;
• responsive to determining that the address of the target receiving bus node does not match an address of the receiving bus node, suppressing, by the receiving bus node, an acknowledgment of receipt of the address signal;
• and
• responsive to determining that both the address of the target receiving bus node matches an address of the receiving bus node and the parity signal is not the expected parity signal, suppressing, by the receiving bus node, the acknowledgment of receipt of the address signal.

A method of address verification on a bus, the bus connecting a plurality of receiving bus nodes and one or more sending bus nodes, the bus providing communication among the bus nodes, the method comprising:

• transmitting, by a sending bus node over the bus, a parity signal and an address signal, the address signal identifying an address of a target receiving bus node, wherein the sending bus node first transmits the address signal as a plurality of bits on a signal line of the bus and, immediately following the address signal, transmits the parity signal as at least one bit on the same signal line;
• determining, by a receiving bus node, whether the address of the target receiving bus node matches an address of the receiving bus node;
• responsive to determining that the address of the target receiving bus node matches the address of the receiving bus node, determining, by the receiving bus node, whether the parity signal is an expected parity signal, wherein values of the parity signal and the expected parity signal are determined based on an address of a corresponding receiving bus node;
• responsive to determining that the address of the target receiving bus node does not match an address of the receiving bus node, suppressing, by the receiving bus node, an acknowledgment of receipt of the address signal;
• responsive to determining that both the address of the target receiving bus node matches an address of the receiving bus node and the parity signal is not the expected parity signal, suppressing, by the receiving bus node, the acknowledgment of receipt of the address signal;
• determining, by the sending bus node, whether at least one of the parity signal or the address signal were interfered with during transmission;
• and
• responsive to determining that at least one of the parity signal and the address signal were interfered with during transmission, retransmitting, by the sending bus node over the bus, the parity signal and the address signal.