Glitch-free wide supply range transceiver for integrated circuits

A receiver, comprising:

• a pad splitter circuit coupled to a pad, the pad splitter circuit configured to generate a first logic signal and a second logic signal;
• a wide-range receiver coupled to the pad splitter circuit to receive the first and second logic signals, the wide-range receiver comprising a combination of a first Schmitt trigger receiver and a second Schmitt trigger receiver and further comprising:
• first, second, and third p-channel transistors coupled between a supply node and a top input node, a gate of the first p-channel transistor coupled to receive a first enable voltage, a gate of the second p-channel transistor coupled to receive a first bias voltage, and a gate of the third p-channel transistor coupled to receive the second logic signal;
• a first n-channel transistor coupled between a bottom input node and a reference node, a gate of the first n-channel transistor coupled to receive the second logic signal;
• and
• a first transmission gate coupled between the top input node and the bottom input node;
• a control circuit coupled to the pad splitter circuit and the wide-range receiver;
• and
• a bias generator circuit coupled to the pad splitter circuit and the wide-range receiver.

A transceiver, comprising:

• a transmitter that includes:
• an input circuit configured to couple a logic signal to a first node and a second node;
• a first level-shifter having an input coupled to the first node;
• a first pre-driver having an input coupled to an output of the first level-shifter;
• a second-level shifter having an input coupled to the second node;
• a second pre-driver having an input coupled to an output of the second level-shifter, the second pre-driver configured to generate an output signal having a first voltage swing in a first mode and a second voltage swing in a second mode;
• and
• a driver including a stack of a top p-channel transistor, a bottom p-channel transistor, a top n-channel transistor, and a bottom n-channel transistor coupled between a supply node and a ground node, a gate of the top p-channel transistor coupled to receive the output signal of the second pre-driver, a gate of the bottom n-channel transistor coupled to an output of the first pre-driver, and gates of the bottom p-channel transistor and the top n-channel transistor coupled to receive first and second bias voltages, respectively;
• and
• a receiver that includes:
• a pad splitter circuit coupled to a pad, the pad splitter circuit configured to generate a first logic signal and a second logic signal;
• a wide-range receiver coupled to the pad splitter circuit to receive the first and second logic signals, the wide-range receiver comprising a combination of a first Schmitt trigger receiver and a second Schmitt trigger receiver and further comprising first circuitry that provides a first resistance and second circuitry that provides a second resistance, the first resistance in parallel to the second resistance, and third circuitry that provides a third resistance, coupled in series with the parallel combination of the first resistance, and wherein the combination of the first, second, and third resistance controls a trigger point of the wide-range receiver;
• a control circuit coupled to the pad splitter circuit and the wide-range receiver;
• and
• a bias generator circuit coupled to the pad splitter circuit and the wide-range receiver.