Delay circuit

A physical unclonable functions (PUF) arbiter circuit, comprising:

• a multiplicity of delay circuits, each delay circuit comprising:
• an electronic transmission element with
• a first transmission element input and a first transmission element output, wherein the first transmission element input is coupled to the first transmission element output by means of two first complementary switches wired in parallel, wherein the first switches each have a control input;
• a second transmission element input and a second transmission element output, wherein the second transmission element input is coupled to the second transmission element output by means of two second complementary switches wired in parallel, wherein the second switches each have a control input;
• wherein the first transmission element output is coupled to the control inputs of the second switches and the second transmission element output is coupled to the control inputs of the first switches;
• an input circuit, configured to receive an input signal and feed the input signal to one of the transmission element inputs and feed the inverted input signal to the other of the transmission element inputs;
• and
• an output circuit, coupled to the first transmission element output and the second transmission element output and configured to provide an output signal, wherein the output circuit is configured in such a way that the output signal only changes in the case of a change in the input signal if the change in the input signal has brought about a change both at the first transmission element output and at the second transmission element output.