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US 10,483,945 B2Granted
Switched capacitor based digital step attenuator
AssigneeTexas Instruments Incorporated
InventorsRajendrakumar Joish, Visvesvaraya Pentakota
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Abstract
The disclosure provides an RF receiver. The RF receiver includes an input driver. The input driver receives a coarse signal, and generates an input signal. A digital step attenuator (DSA) is coupled to the input driver and receives the input signal. An analog to digital converter (ADC) is coupled to the DSA. The DSA includes a serial capacitor coupled to the input driver. The DSA also includes a sampling capacitor coupled to the ADC.
Claims20
An RF receiver comprising:
- an input driver configured to receive a coarse signal, and configured to generate an input signal;
- a digital step attenuator (DSA) coupled to the input driver and configured to receive the input signal;
- and
- an analog to digital converter (ADC) coupled to the DSA, wherein the DSA further comprises:
- a serial capacitor coupled to the input driver;
- and
- a sampling capacitor coupled to the ADC.
4 more elements
An RF receiver comprising a digital step attenuator (DSA), the DSA comprising:
- an array of secondary resistors coupled to a DSA input terminal;
- a set of first switches coupled between the array of secondary resistors and a fixed voltage terminal, each first switch of the set of first switches is coupled between a secondary resistor of the array of secondary resistors and the fixed voltage terminal;
- and
- an array of serial capacitors coupled between the DSA input terminal and a set of second switches, wherein each second switch of the set of second switches is coupled between a serial capacitor of the array of serial capacitors and the fixed voltage terminal.
1 more element
A computing device comprising:
- a processing unit;
- a memory module coupled to the processing unit;
- and
- an RF receiver coupled to the processing unit and the memory module, the RF receiver further comprising:
- an input driver configured to receive a coarse signal, and configured to generate an input signal;
- a digital step attenuator (DSA) coupled to the input driver and configured to receive the input signal;
- and
- an analog to digital converter (ADC) coupled to the DSA, wherein the DSA further comprises:
- a serial capacitor coupled to the input driver;
- and
- a sampling capacitor coupled to the ADC.
8 more elements
A method comprising:
- receiving an attenuation setting from an automatic gain control (AGC) block;
- receiving an input signal in a digital step attenuator (DSA), the DSA is coupled to the AGC block;
- fixing value of a serial capacitor and a sampling capacitor in the DSA based on the attenuation setting;
- closing a sampling switch during a sample phase;
- charging the serial capacitor and the sampling capacitor by the input signal, wherein the serial capacitor and the sampling capacitor are in series;
- opening the sampling switch during a hold phase;
- and
- providing a charge accumulated on the sampling capacitor to an analog to digital converter (ADC), the ADC coupled between the DSA and the AGC block.
5 more elements
Dependencies are inferred from the claim text.