Multiport inductors for enhanced signal distribution
AssigneeCredo Technology Group Limited
InventorXiang Gao
Life of this patent
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Abstract
Integrated circuits such as multi-channel transceivers may share oscillators having loop inductors. To minimize the driving distance from the shared oscillators to the transceiver modules, the loop inductor may be equipped with an additional sense port diametrically opposite to the drive port. An oscillator drive core may be coupled to the drive port to provide an oscillating signal at the drive and sense ports. The oscillating signals can be converted into digital clock signals by way of a differential amplifier. Three-loop inductor designs and/or multi-winding inductor designs may be preferred for minimizing parasitic effects of the added sense port.
Claims20
An integrated circuit comprising:
- a substrate;
- and
- an inductor having:
- multiple loops on said substrate, each loop defining a corresponding dipole, said dipoles summing to zero with two side loop dipoles being equal and arranged symmetrically relative to a center loop dipole;
- a drive port on an outer perimeter of the inductor;
- and
- a sense port connected to taps on the outer perimeter, the sense port positioned diametrically opposite the drive port.
An electrical circuit manufactured on a substrate, the electrical circuit comprising:
- at least two modules;
- and
- a shared oscillator including:
- an inductor having a drive port and a sense port, the inductor being a three-loop inductor with a center loop and two side loops, the two side loops having associated dipoles that combine to substantially cancel a dipole associated with the center loop;
- and
- a drive core coupled to the drive port to produce oscillating signals from the drive port and the sense port,
- wherein a first of the at least two modules receives a clock derived from the drive port's oscillating signal via a first trace, and a second of the at least two modules receives a clock derived from the sense port's oscillating signal via a second trace,
- wherein the first and second traces, along with any inline buffers, have a combined length less than a shortest distance between the two modules.
A method for manufacturing an integrated circuit with a shared on-chip oscillator, the method comprising:
- providing an inductor having:
- a center loop and two side loops on a substrate, the two side loops having associated dipoles that combine to substantially cancel a dipole associated with the center loop;
- a drive port on an outer perimeter of the inductor;
- and
- a sense port connected to taps on the outer perimeter, the sense port positioned diametrically opposite the drive port;
- coupling a drive core to the drive port to produce oscillating signals from the drive port and the sense port;
- providing a first trace to convey a clock derived from the drive port's oscillating signal to a first circuit module on one side of the inductor;
- and
- providing a second trace to convey a clock derived from the sense port's oscillating signal to a second circuit module on an opposite side of the inductor, wherein the first and second traces have a combined length that is less than a shortest distance between the first and second circuit modules.
Dependencies are inferred from the claim text.