Semiconductor device including a gate contact structure

A semiconductor device, comprising:

• a semiconductor body having a first surface and a second surface opposite to the first surface;
• a transistor cell structure in the semiconductor body;
• a gate contact structure comprising a gate line electrically coupled to a gate electrode layer of the transistor cell structure, and a gate pad electrically coupled to the gate line to form an electrical pathway between the gate pad and the gate electrode layer;
• and
• a gate interconnecting structure separate from the gate contact structure and comprising gate interconnecting elements protruding from the gate electrode layer and being electrically coupled in parallel to the gate line,
• wherein the gate interconnecting structure is formed on a different isolation layer than the gate contact structure,
• wherein a minimum resistance of the gate interconnecting elements is greater than 40 Ohm.

A method for manufacturing a semiconductor device, the method comprising:

• forming a transistor cell structure in a semiconductor body having a first surface and a second surface opposite to the first surface;
• forming a gate contact structure comprising a gate line electrically coupled to a gate electrode layer of the transistor cell structure, and a gate pad electrically coupled to the gate line to form an electrical pathway between the gate pad and the gate electrode layer;
• and
• forming a gate resistor structure separate from the gate contact structure, integrated in the electrical pathway between the gate pad and the gate electrode layer, and formed on a different isolation layer than the gate contact structure,
• wherein an electric resistivity of the gate resistor structure is greater than the electric resistivity of the gate electrode layer.

A method for manufacturing a semiconductor device, the method comprising:

• forming a transistor cell structure in a semiconductor body having a first surface and a second surface opposite to the first surface;
• forming a gate contact structure comprising a gate line electrically coupled to a gate electrode layer of the transistor cell structure, and a gate pad electrically coupled to the gate line to form an electrical pathway between the gate pad and the gate electrode layer;
• and
• forming a gate interconnecting structure separate from the gate contact structure and comprising gate interconnecting elements protruding from the gate electrode layer and electrically coupled in parallel to the gate line, the gate interconnecting structure being formed on a different isolation layer than the gate contact structure,
• wherein a minimum resistance of the gate interconnecting elements is greater than 40 Ohm.