Semiconductor device

A semiconductor device comprising:

• a substrate;
• a first transistor, which includes a first impurity region of a first conductivity type formed in the substrate, and which includes a second impurity region of the first conductivity type formed in the substrate;
• a first guard ring of a second conductivity type different from the first conductivity type, formed in the substrate, the first guard ring surrounding the first transistor in a plan view;
• a first wiring formed on the first guard ring and electrically connected to the first guard ring;
• and
• a power supply wiring formed on the first wiring, the power supply wiring being electrically connected to the first wiring and the first impurity region,
• wherein
• the first transistor includes a first part and a second part which are respectively arranged in a first direction in a plan view,
• the first part of the first transistor is separated with a first distance from the first guard ring in a second direction which is perpendicular to the first direction in a plan view,
• the second part of the first transistor is separated with a second distance from the first guard ring in the second direction in a plan view,
• the second distance is shorter than the first distance,
• the first part is separated from the power supply wiring in a plan view, and
• the second part is overlapped with the power supply wiring in a plan view.

A semiconductor device comprising:

• a substrate;
• a first transistor which includes a first impurity region of a first conductivity type formed in the substrate, and which includes a second impurity region of the first conductivity type formed in the substrate;
• a first guard ring of a second conductivity type different from the first conductivity type, formed in the substrate, the first guard ring surrounding the first transistor in a plan view;
• a first wiring formed on the first guard ring and electrically connected to the first guard ring;
• a ground wiring formed on the first wiring, the ground wiring being electrically connected to the first wiring and the second impurity region;
• a second transistor, which includes a third impurity region of the second conductivity type formed in the substrate, and which includes a fourth impurity region of the second conductivity type formed in the substrate;
• a second guard ring of the first conductivity type formed in the substrate, the second guard ring surrounding the second transistor in a plan view;
• a second wiring formed on the second guard ring and electrically connected to the second guard ring;
• and
• a power supply wiring formed on the second wiring, the power supply wiring being electrically connected to the second wiring and the third impurity region,
• wherein
• the first transistor includes a first part and a second part,
• the first part of the first transistor is separated with a first distance from the first guard ring in a plan view,
• the second part of the first transistor is separated with a second distance from the first guard ring in a plan view,
• the second distance is shorter than the first distance,
• the first part is separated from the ground wiring in a plan view,
• the second part is overlapped with the ground wiring in a plan view,
• the second transistor includes a third part and a fourth part,
• the third part of the second transistor is separated with a third distance from the second guard ring in a plan view,
• the fourth part of the second transistor is separated with a fourth distance from the second guard ring in a plan view,
• the fourth distance is shorter than the third distance,
• the third part is separated from the power supply wiring in a plan view, and
• the fourth part is overlapped with the power supply wiring in a plan view.