US 10,483,303 B1Granted

Image sensor having mirror-symmetrical pixel columns

AssigneeOmniVision Technologies, Inc.

InventorsKeiji Mabuchi, Sohei Manabe

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Abstract

An image sensor is provided. The image sensor includes: a first pixel column, including: a first pixel unit; a second pixel unit, vertically adjacent to the first pixel unit; a first column bit line coupled to the first pixel unit, wherein image data acquired by the first pixel unit is read out through the first column bit line; and a second column bit line coupled to the second pixel unit, wherein image data acquired by the second pixel unit is read out through the second column bit line; and a second pixel column horizontally adjacent to the first pixel column, wherein the first pixel column and the second pixel column are mirror-symmetrical with respect to a connection between the pixel units and the column bit lines.

Claims20

Dependent claims

An image sensor, comprising

a first pixel unit;
a second pixel unit, vertically adjacent to the first pixel unit;
a third pixel unit, horizontally adjacent to the second pixel unit;
a fourth pixel unit, horizontally adjacent to the first pixel unit and vertically adjacent to the third pixel unit, wherein the first, second, third, and fourth pixel units are arranged into a 2×2 array of pixel units;
a first column bit line coupled to the first pixel unit, wherein image data acquired by the first pixel unit is read out through the first column bit line;
a second column bit line coupled to the second pixel unit, wherein image data acquired by the second pixel unit is read out through the second column bit line;
a third column bit line coupled to the third pixel unit, wherein image data acquired by the third pixel unit is read out through the third column bit line, and wherein the second column bit line is between the first column bit line and the third column bit line;
and
a fourth column bit line coupled to the fourth pixel unit, wherein image data acquired by the fourth pixel unit is read out through the fourth column bit line, and wherein the third column bit line is between the second column bit line and the fourth column bit line.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/179,080Filed 2 Nov 2018
Granted: 19 Nov 2019
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

H10F 39/8027
Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes: geometry of the photosensitive area
H04N 25/78
Addressed sensors, e.g. MOS or CMOS sensors: readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
H10F 39/182
Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors: colour image sensors
H04N 25/77
Addressed sensors, e.g. MOS or CMOS sensors: pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Family

No related US applications are recorded in the indexed filing history.

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