Semiconductor device and method of manufacturing the same

A method of manufacturing a semiconductor device, the method comprising:

• (a) forming a first insulating film having a first thickness over a main surface of a semiconductor substrate and then forming a second insulating film having a second thickness larger than the first thickness over the first insulating film;
• (b) sequentially processing the second insulating film, the first insulating film, and the semiconductor substrate to form a plurality of trenches and to form a plurality of projecting portions which include portions of the semiconductor substrate extending in a first direction along the main surface of the semiconductor substrate and are spaced apart from each other in a second direction orthogonal to the first direction along the main surface of the semiconductor substrate;
• (c) depositing a third insulating film over the main surface of the semiconductor substrate such that the third insulating film is embedded in the trenches;
• (d) planarizing an upper surface of the third insulating film and an upper surface of the second insulating film;
• (e) removing the second insulating film;
• (f) performing isotropic dry etching to remove the first insulating film, expose respective upper surfaces of the projecting portions, recess an upper surface and a side surface of the third insulating film, and expose respective side walls of the projecting portions from the upper surface of the third insulating film;
• (g) forming a first gate electrode extending in the second direction such that a fourth insulating film is interposed between the first gate electrode and each of the respective upper surfaces and side walls of the projecting portions which are exposed from the upper surface of the third insulating film;
• and
• (h) forming a second gate electrode extending in the second direction such that a fifth insulating film including a trapping insulating film is interposed between the second gate electrode and each of the respective upper surfaces and side walls of the projecting portions which are exposed from the upper surface of the third insulating film and one of side walls of the first gate electrode,
• wherein, between the projecting portions adjacent to each other in the second direction, a portion of the upper surface of the third insulating film is higher in level than a first surface obtained by connecting a position of the upper surface of the third insulating film which is in contact with the side wall of one of the projecting portions to a position of the upper surface of the third insulating film which is in contact with the side wall of other projecting portion.