Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device, comprising the steps of:

• (a) providing a semiconductor substrate including a first region for a first transistor, a second region for a nonvolatile memory cell and a third region for a second transistor;
• (b) forming a first gate insulating film for the first transistor over a main surface of the semiconductor substrate in the first region;
• (c) after the step (b), forming a second gate insulating film including a charge trapping layer for the nonvolatile memory cell over the main surface of the semiconductor substrate in the second region;
• (d) after the step (c), forming a third gate insulating film for the second transistor over the main surface of the semiconductor substrate in the third region;
• (e) after the step (d), forming a first film over the main surface of the semiconductor substrate covering the first, second and third gate insulating films;
• and
• (f) after the step (e), patterning the first film for forming a first gate electrode for the first transistor in the first region, a second gate electrode for the nonvolatile memory cell in the second region and a third gate electrode for the second transistor in the third region,
• wherein a thickness of the first gate insulating film for the first transistor is larger than that of the third gate insulating film for the third transistor,
• wherein the semiconductor substrate provided in the step (a) and located in the third region has a SOI structure having a supporting substrate, an insulating layer over the supporting substrate, and a semiconductor layer over the insulating layer,
• wherein the semiconductor substrate provided in the step (a) and located in each of the first and second region has neither the insulating layer nor the semiconductor layer while having the supporting substrate,
• wherein, in the step (b), the first gate insulating film is formed over the supporting substrate located in the first region,
• wherein, in the step (c), the second gate insulating film is formed over the supporting substrate located in the second region,
• wherein, in the step (d), the third gate insulating film is formed over the semiconductor layer in the third region, and
• wherein the third gate electrode is formed over the semiconductor layer located in the third region via the third gate insulating film.