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US 10,483,271 B2Granted
Non-volatile memory structure and manufacturing method thereof
AssigneePowerchip Semiconductor Manufacturing Corporation
InventorZih-Song Wang
Life of this patent
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Abstract
A non-volatile memory structure including memory cells, at least one isolation layer, and at least one shield electrode is provided. The memory cells are disposed on a substrate. The isolation layer is located between the memory cells. The shield electrode is disposed on the isolation layer and electrically connected to a source line.
Claims9
A non-volatile memory structure, comprising:
- memory cells disposed on a substrate;
- at least one isolation layer located between the memory cells;
- and
- at least one shield electrode disposed on the at least one isolation layer and electrically connected to a source line wherein the non-volatile memory structure is a vertical non-volatile memory structure, and the vertical non-volatile memory structure comprises:
- a stacked structure disposed on the substrate and comprising the at least one shield electrode, gate structures, and the at least one isolation layer, wherein the at least one shield electrode and the gate structures are alternately stacked, and the at least one isolation layer is located between the at least one shield electrode and the gate structures;
- a channel layer disposed on a sidewall at a side of the stacked structure;
- and a charge storage structure layer disposed between the stacked structure and the channel layer.
4 more elements
Dependencies are inferred from the claim text.