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US 10,483,260 B2Granted
Semiconductor carrier with vertical power FET module
OwnerL. Pierre de Rochemontinventor
Life of this patent
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Abstract
A monolithic power management module provides a chip carrier with surfaces, ground traces, signal and power interconnects; a three dimensional FET formed on the chip carrier to modulate currents through the carrier or on the carrier surface; a toroidal inductor or transformer coil with a ceramic magnetic core formed on the chip carrier adjacent to the FET and having a first winding connected to the FET, and a plurality of passive ceramic components formed on the chip carrier surface.
Claims11
A monolithic power management module, comprising:
- a chip carrier further comprising surfaces, ground traces, signal and power interconnects;
- a three dimensional FET formed on the chip carrier to modulate currents through the chip carrier or on the surfaces;
- a toroidal inductor or transformer coil with a ceramic magnetic core formed on the chip carrier adjacent to the three dimensional FET and having a first winding connected to the three dimensional FET, and
- a plurality of passive ceramic components formed on the chip carrier surfaces including clock circuitry in a form of an LCR resonator further comprising an inductor coil, a capacitive element and a resistive element;
- and
- wherein the three dimensional FET includes an elongated gate electrode comprising a conductor that forms a resonant transmission line by configuring the conductor to form a serpentine electrode that contains a capacitive element determined by charge-collected beneath the gate, a resistive dement determined by the conductor, length and cross-sectional area, of the conductor used to form the serpentine electrode, and an Inductive element formed by half-turns that loop the serpentine electrode winding back upon itself.
3 more elements
Dependencies are inferred from the claim text.