Semiconductor device including dual pad wire bond interconnection

A semiconductor device, comprising:

• a substrate;
• a plurality of stacked semiconductor die mounted to the substrate, a semiconductor die of the stacked semiconductor die comprising:
• integrated circuits formed adjacent the first major surface,
• a set of first die bond pads spaced inward from an edge of the semiconductor die and electrically connected to the integrated circuits by metal interconnects, and
• a set of second die bond pads at the edge of the semiconductor die and adjacent the set of first die bond pads;
• and
• a plurality of wire bonds having a first end electrically coupled to the set of second die bond pads.

A semiconductor die, comprising:

• a first major surface;
• a second major surface opposed to the first major surface;
• integrated circuits formed adjacent the first major surface in an active area;
• a set of functional die bond pads spaced inward from an edge of the semiconductor die and electrically connected to the integrated circuits by metal interconnects within the active area;
• a set of dummy die bond pads at the edge of the semiconductor die and adjacent the set of functional die bond pads, the set of dummy die bond pads configured to receive a bond wire;
• and
• a seal ring formed beneath a surface of the semiconductor die, the set of functional die bond pads spaced inward from the edge of the semiconductor die a greater amount than an amount by which the seal ring is spaced inward from the edge of the semiconductor die.