Chip packages and methods of manufacture thereof

A method for forming a semiconductor package, the method comprising:

• attaching a first die and a second die to a carrier, the first die being laterally adjacent to the second die;
• forming a first conductive pillar over a first contact pad of the first die, the first contact pad being on an upper surface of the first die facing away from the carrier;
• forming a second conductive pillar over a second contact pad of the second die, the second contact pad being on an upper surface of the second die facing away from the carrier;
• attaching a third die to the upper surface of the first die and to the upper surface of the second die, wherein the first die and the second die extend beyond lateral extents of the third die, wherein the third die has a third conductive pillar over a third contact pad of the third die, wherein the third contact pad is on an upper surface of the third die facing away from the carrier;
• depositing, in a single process, a molding material around the first die, the second die, the third die, the first conductive pillar, and the second conductive pillar;
• recessing the molding material, wherein after the recessing, an upper surface of the molding material is level with an upper surface of the first conductive pillar, an upper surface of the second conductive pillar, and an upper surface of the third conductive pillar;
• and
• forming a first redistribution layer (RDL) over and electrically coupled to the first conductive pillar, the second conductive pillar, and the third conducive pillar.

A method comprising:

• attaching a first side of a first die to a carrier, wherein the first die has a first conductive pillar disposed over a first contact pad on a second side of the first die opposing the first side of the first die;
• forming a first redistribution layer (RDL) between the first conductive pillar and the first contact pad of the first die, wherein sidewalls of the first RDL are aligned with respective sidewalls of the first die;
• attaching a first side of a second die to the carrier such that the second die is laterally adjacent to the first die, wherein the second die has a second conductive pillar disposed over a second contact pad on a second side of the second die opposing the first side of the second die;
• forming a second RDL between the second conductive pillar and the second contact pad of the second die, wherein sidewalls of the second RDL are aligned with respective sidewalls of the second die, wherein the first RDL and the second RDL are spaced apart from each other;
• attaching a third die to the second side of the first die and to the second side of the second die, wherein a first portion of the third die extends outside a lateral extent of the first die, and a second portion of the third die extends outside a lateral extent of the second die;
• after the first die, the second die and the third die are attached, embedding the first die, the second die, the third die, the first conductive pillar and the second conductive pillar in a molding layer, wherein the molding layer extends continuously from the first side of the first die to a first side of the third die facing away from the first die;
• thinning the molding layer, wherein after the thinning, the molding layer, the first conductive pillar, the second conductive pillar, and a third conductive pillar of the third die have a coplanar upper surface;
• and
• forming a third RDL over the molding layer, wherein the third RDL is electrically coupled to the first conductive pillar, the second conductive pillar and the third conductive pillar.