Method for fabricating bump structures on chips with panel type process

A method for fabricating a bump structure on a chip with panel type process, comprising in sequential order:

• providing an integrated carrier and a plurality of semiconductor chips, which has an active side and a reverse side relative to the active side, the active side of each semiconductor chip has a plurality of metal electrode pads and an insulated protecting layer, which is exposed out of the metal electrode pads;
• fixing the reverse side of each semiconductor chip on the integrated carrier;
• executing an electroless plating process to form an under bump metallurgy (UBM) structure on the metal electrode pad of each semiconductor chip, wherein the coverage range of the UBM structure is equal to the coverage range of the metal electrode pad;
• forming a dielectric layer to cover the integrated carrier, the semiconductor chips and the UBM structure;
• forming a plurality of via holes through the dielectric layer and are exposed out of the UBM structure by laser drill or lithography including exposure and development processes;
• and forming a plurality of metal bumps in the corresponding via hole of the dielectric layer, respectively;
• wherein the electrode pad is an aluminum metal electrode pad, and the electroless plating process includes an electroless nickel plating process, a first electroless gold plating process, an electroless palladium plating process and a second electroless gold plating process that is forming a nickel metal layer on the aluminum metal electrode pad, forming a first gold metal layer on the nickel metal layer, forming a palladium metal layer on the first gold metal layer and forming a second gold metal layer on the palladium metal layer;
• and
• wherein the order of arrangement from below is respectively the aluminum metal electrode pad, the nickel metal layer, the first gold metal layer, the palladium metal layer, the second gold metal layer and the metal bump.