Fan-out package structure and method for forming the same

A semiconductor package structure, comprising:

• a first semiconductor package, comprising:
• a first RDL structure having a first surface and a second surface opposite thereto;
• a first semiconductor die disposed on and electrically coupled to the first surface of the first RDL structure;
• two electronic components respectively disposed on and electrically coupled to the first and second surface of the first RDL structure;
• a first molding compound disposed on the first surface of the first RDL structure and surrounding the first semiconductor die;
• a plurality of screen printed conductive pillar structures disposed in and exposed from the first molding compound, wherein each of the plurality of screen printed conductive pillar structures comprises a metal pillar and a solder material that is bonded between the metal pillar and the first RDL structure such that the plurality of screen printed conductive pillar structures are bonded onto and electrically coupled to the first RDL structure;
• and
• wherein the semiconductor package structure further comprises a second semiconductor package coupled to the first semiconductor package by a plurality of first conductive structures that are in contact with the plurality of screen printed conductive pillar structures, the second semiconductor package being spaced within 50 microns of the first semiconductor package.

A method for forming a semiconductor package structure, comprising:

• forming a first semiconductor package structure, comprising:
• forming a first RDL structure on a carrier substrate, wherein the first RDL structure has a first surface and a second surface opposite thereto and the second surface of the first RDL structure is attached to the carrier substrate;
• screen printing a plurality of solder balls on the first surface of the first RDL structure;
• mounting a first semiconductor die and a first electronic component onto the first surface of the first RDL structure, wherein the first semiconductor die is electrically coupled to the plurality of solder balls through the first RDL structure;
• forming a first molding compound on the first surface of the first RDL structure, such that the first semiconductor die and the plurality of solder balls are embedded in the first molding compound;
• forming a plurality of openings in the first molding compound to correspondingly expose the plurality of solder balls;
• removing the carrier substrate from the first RDL structure;
• mounting a second electronic component onto the second surface of the first RDL structure after removing the carrier substrate;
• and
• forming a plurality of first conductive structures that fill the plurality of openings and are in contact with the plurality of solder balls;
• and
• coupling a second semiconductor package to the first semiconductor package structure by the plurality of first conductive structures, the second semiconductor package being spaced within 50 microns of the first semiconductor package structure.

A method for forming a semiconductor package structure, comprising:

• forming a first semiconductor package structure, comprising:
• forming a first RDL structure on a carrier substrate, wherein the first RDL structure has a first surface and a second surface opposite thereto and the second surface of the first RDL structure is attached to the carrier substrate;
• screen printing a plurality of conductive pillar structures on the first RDL structure, wherein each of the plurality of conductive pillar structures comprises a metal pillar and a solder material that is bonded between the metal pillar and the first RDL structure such that the plurality of conductive pillar structures are bonded onto and electrically coupled to the first RDL structure;
• mounting a first semiconductor die and a first electronic component onto the first surface of the first RDL structure, wherein the first semiconductor die is electrically coupled to the plurality of conductive pillar structures through the first RDL structure;
• forming a first molding compound on the first surface of the first RDL structure, such that the first semiconductor die and the plurality of conductive pillar structures are in the first molding compound, wherein the plurality of conductive pillar structures is exposed from the first molding compound;
• removing the carrier substrate from the first RDL structure;
• and
• mounting a second electronic component onto the second surface of the first RDL structure after removing the carrier substrate;
• and
• coupling a second semiconductor package to the first semiconductor package structure by a plurality of first conductive structures that are in contact with the plurality of conductive pillar structures, the second semiconductor package being spaced within 50 microns of the first semiconductor package structure.