Apparatus for stacking semiconductor chips in a semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsGun-Ah Lee, Ji-Hwan Hwang, Cha-Jea Jo, Dong-Han Kim, Seung-Kon Mok
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Abstract
An apparatus for stacking semiconductor chips includes a push member configured to apply pressure to a semiconductor chip disposed on a substrate. The push member includes a push plate configured to contact the semiconductor chip, and a push rod connected to the push plate. The push plate includes a central portion having an area smaller than an area of an upper side of the semiconductor chip, and a plurality of protrusions disposed at respective ends of the central portion.
Claims19
An apparatus for stacking semiconductor chips, comprising:
- a push member configured to apply pressure to a semiconductor chip disposed on a substrate, and wherein the push member comprises a push plate configured to contact the semiconductor chip, and a push rod connected to the push plate,
- wherein the push plate comprises:
- a central portion having an area smaller than an area of an upper side of the semiconductor chip;
- and
- a plurality of protrusions disposed at corners of the central portion, and each of the plurality of protrusions protrudes over two adjacent edges of the central portion of the push plate,
- wherein a modulus of elasticity of the plurality of protrusions is higher than a modulus of elasticity of the central portion.
An apparatus for stacking semiconductor chips to be mounted on a substrate, each of the semiconductor chips comprising a joining member at a lower portion of the chip, the apparatus being configured to apply pressure to the semiconductor chips to connect the semiconductor chips to the substrate or to connect the semiconductor chips to each other, the apparatus comprising:
- a stage on which the substrate is disposed, wherein the semiconductor chips are stacked on the substrate;
- a push member that faces the stage and is configured to apply pressure to each of the semiconductor chips;
- and
- a pressure gauge configured to measure the pressure applied to the semiconductor chips by the push member,
- wherein the push member comprises a push plate configured to contact at least one of the semiconductor chips and a push rod connected to the push plate, and
- wherein an area of a central portion of the push plate is smaller than an area of an upper side of the at least one of the semiconductor chips, wherein the central portion of the push plate at least partially overlaps the semiconductor chip, and
- wherein a plurality of protrusions is disposed at corners of the central portion of the push plate, and
- herein a modulus of elasticity of the plurality of protrusions is higher than a modulus of elasticity of the central portion.
An apparatus for stacking semiconductor chips, comprising:
- a push member configured to apply pressure to a semiconductor chip, wherein the semiconductor chip is disposed on a substrate, and wherein the push member comprises a push plate configured to contact the semiconductor chip, and a push rod connected to the push plate,
- wherein, the push plate comprises:
- a flat first portion;
- and
- two or more flat second portions disposed at ends of the flat first portion, wherein the flat first portion includes a curved part and one of the two or more flat second portions is disposed at a first end of the curved part,
- wherein the push plate is configured such that when the push member applies the pressure to the semiconductor chip, the flat first portion of the push plate is fully overlapped by the semiconductor chip, and each of the two or more flat second portions at least partially overlap the semiconductor chip,
- wherein a modulus of elasticity of the flat first portion is lower than a modulus of elasticity of the two or more flat second portions.
Dependencies are inferred from the claim text.