Local x-decoder and related memory system
AssigneeWuhan Xinxin Semiconductor Manufacturing Co., Ltd.
InventorsYuan Tang, Jen-Tai Hsu
Life of this patent
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Abstract
A local X-decoder for a memory system includes a decoding unit configured to generate a word line signal to a memory cell of a memory array of the memory system; and an unselected erase detecting unit coupled to the decoding unit, and configured to increase an absolute voltage coupled to the word line signal from a well of the memory cell according to an unselected erase mode signal generated by an erase mode decoder of the memory system; wherein the word line signal is floating to a same level as the well of the memory cell when the memory cell is unselected in an erase mode of the memory system.
Claims20
A local X-decoder for a memory system, comprising:
- a decoding unit configured to generate a word line signal to a memory cell of a memory array of the memory system;
- and
- an unselected erase detecting unit coupled to the decoding unit, and configured to increase an absolute voltage coupled to the word line signal from a well of the memory cell according to an unselected erase mode signal generated by an erase mode decoder of the memory system;
- wherein the word line signal is floating to a same level as the well of the memory cell when the memory cell is unselected in an erase mode of the memory system.
A memory system, comprising:
- a memory array comprising a memory cell;
- a power source configured to generate a first voltage source VPPX;
- a bank decoder configured to generate a local mode voltage source SVPPX_b;
- an erase mode decoder coupled to the bank decoder and the power source, and configured to generate an unselected erase mode signal according to the first voltage source and the local mode voltage source;
- a local X-decoder coupled to the memory cell and the erase mode decoder, comprising:
- a decoding unit configured to generate a word line signal to of the memory cell;
- and
- an unselected erase detecting unit coupled to the decoding unit, and configured to increase an absolute voltage coupled to the word line signal from a well of the memory cell according to the unselected erase mode signal;
- wherein the word line signal is floating when the memory cell is unselected in an erase mode of the memory system.
Dependencies are inferred from the claim text.