RRAM-based monotonic counter

A circuit, comprising:

• a memory array having a plurality of resistive random access memory (RRAM) cells;
• a control logic circuit, coupled to the memory array, and configured to use a first voltage signal to cause a first RRAM cell of the plurality of RRAM cells to transition from a first resistance state to a second resistance state;
• and
• a counter circuit, coupled to the control logic circuit, and configured to increment a count by one in response to the first RRAM cell's transition from the first to the second resistance state;
• and
• an encryption circuit, coupled to the counter circuit, configured to generate an encrypted value using an updated count provided by the counter circuit.

A method, comprising:

• providing a memory cell that is in a first resistance state;
• transitioning the memory cell from the first resistance state to a second resistance state;
• incrementing a count of a counter by one in response to the memory cell's transition from the first to second resistance state;
• transitioning the memory cell from the second resistance state to a third resistance state;
• again incrementing the count of the counter by one in response to the memory cell's transition from the second to third resistance state;
• and
• generating an encrypted value using an updated count provided by the counter.