Phase change memory device
AssigneeMicron Technology, Inc.
InventorsFabio Pellizzer, Roberto Bez, Ferdinando Bedeschi, Roberto Gastaldi
Life of this patent
Estimating the term…
Abstract
A phase change memory device with memory cells (2) formed by a phase change memory element (3) and a selection switch (4). A reference cell (2a) formed by an own phase change memory element (3) and an own selection switch (4) is associated to a group (7) of memory cells to be read. An electrical quantity of the group of memory cells is compared with an analogous electrical quantity of the reference cell, thereby compensating any drift in the properties of the memory cells.
Claims20
A memory system, comprising:
- a memory array comprising multiple memory cells, each coupled to a data bitline, the memory cells arranged in groups with the memory cells of each group coupled to a single wordline;
- multiple reference cells, each reference cell connected to a reference bitline, with at least two reference cells associated with each group of memory cells;
- and
- a current/voltage converter connected to the data bitlines and reference bitlines through data bitline switches and reference bitline switches, each of the reference bitline switches being sequentially and alternately operated, during a read operation in a respective group, to sequentially and alternately direct a reference current from the respective reference cell to the current/voltage converter.
A method of accessing a memory device, the method comprising:
- for each group of memory cells coupled to a wordline of a memory array with each wordline having an associated two or more reference cells, the memory cells coupled to data bitlines and the reference cells coupled to reference bitlines, the memory device further including a current/voltage converter connected to the data bitlines and reference bitlines through data bitline switches,
- sequentially and alternately operating each of the reference bitline switches during a read operation in a respective group, to sequentially and alternately direct a reference current from the respective reference cell to the current/voltage converter;
- and
- providing the reference current to comparators associated with each memory cell of the respective group;
- and
- comparing the reference current from the respective reference cell with a reference current associated with each memory cell of the respective group to read a state of each memory cell.
A system comprising:
- a controller;
- and
- a memory coupled to the controller, the memory comprising a memory array comprising multiple memory cells, each coupled to a data bitline, the memory cells arranged in groups with the memory cells of each group coupled to a single wordline;
- multiple reference cells, each reference cell connected to a reference bitline, with at least two reference cells associated with each group of memory cells;
- and
- a current/voltage converter connected to the data bitlines and reference bitlines through data bitline switches and reference bitline switches, each of the reference bitline switches being sequentially and alternately operated, during a read operation in a respective group, to sequentially and alternately direct a reference current from the respective reference cell to the current/voltage converter.
Dependencies are inferred from the claim text.