Static random access memory devices including a plurality of storage cells and a read/write circuit

A static random access memory device including:

• a plurality of storage cells;
• and
• a read-write circuit that is separate from the plurality of storage cells, the read-write circuit configured to modify a state of a storage cell of the plurality of storage cells, wherein the read-write circuit comprises a plurality of access transistors, the number of access transistors of the plurality of access transistors being equal to the number of storage cells and each one of the plurality of access transistors having a dedicated connection between a data node of a respective different one of the plurality of storage cells and a common read-write data node of the read-write circuit, wherein each access transistor of the plurality of access transistors is controlled by a corresponding different wordline control signal, the static random access memory device further comprising boost or voltage pump circuitry configured operable to increase a voltage on each of the wordlines to a level above that of a supply voltage of the static random access memory device.