Semiconductor devices

A semiconductor device comprising:

• a buffer signal generation circuit configured to include a buffer circuit which is activated in response to an initial buffer signal which is generated by comparing an external control signal with a first reference voltage signal if an initialization operation terminates and configured to generate a buffer signal from the external control signal in response to a second reference voltage signal;
• and
• a command/address input control circuit configured to generate a command/address buffer activation signal for controlling activation or inactivation of a command/address buffer in response to the buffer signal;
• wherein the initial buffer signal has a first logic level if the external control signal has a level which is greater than or equal to a level of the first reference voltage signal, and wherein the initial buffer signal has a second logic level if the external control signal has a level which is less than the level of the first reference voltage signal.

A semiconductor device comprising:

• an initial buffer signal generation circuit configured to include an initial buffer circuit which is activated if an initialization operation terminates and configured to generate an initial buffer signal from an external control signal in response to a reference voltage signal;
• and
• a refresh control circuit configured to generate a refresh exit signal in response to the initial buffer signal and a refresh signal;
• wherein the initial buffer signal has a first logic level if the external control signal has a level which is greater than or equal to a level of the reference voltage signal, and
• wherein the initial buffer signal has a second logic level if the external control signal has a level which is less than the level of the reference voltage signal.