Gate driving circuit, gate driving method, array substrate and display panel

A gate driving circuit, comprising:

• a plurality of shift registers cascaded together to successively output a respective drive signals;
• and a plurality of control switches configured for connection to respective gate lines, wherein each of the plurality of shift registers is connected to at least two respective ones of the plurality of control switches to output a respective one of the drive signals to the at least two respective control switches, wherein the plurality of control switches are configured such that the respective control switches connected to the same shift register are turned on and off time-divisionally in response to a respective control signals, whereby the drive signal output by the same shift register is coupled to a corresponding one of the gate lines via a turned-on one of the respective control switches, wherein each of the plurality of shift registers is connected to an equal number of control switches, wherein the plurality of control switches are divided into a number of groups, the number of the groups being equal to the number of the control switches to which each of the shift registers is connected, wherein the respective control switches to which the same shift register is connected belong to respective different ones of the groups, and wherein the plurality of control switches are configured for connection to the gate lines so that the gate lines connected to the control switches belonging to the same group are arranged successively to supply respective drive signals to successive rows of pixels.