A pixel driving circuit, comprising a driving transistor, a first switch, a second switch, a third switch, a fourth switch, a first capacitor, a second capacitor, a charge-voltage terminal, a reset-voltage-signal terminal, a data-voltage-signal terminal, and a driving-voltage-signal terminal;
- wherein the driving transistor comprises a gate terminal, a source terminal, and a drain terminal;
- the first switch is disposed between the gate terminal and the drain terminal, the gate terminal is connected with the reset-voltage-signal terminal via the second switch;
- the source terminal is respectively connected with the driving-voltage-signal terminal and the data-voltage-signal terminal via the third switch and the fourth switch;
- the first capacitor is connected between the gate terminal and the charge-voltage terminal;
- the charge-voltage terminal is connected with a control terminal of the first switch, the second capacitor is connected between the gate terminal and the driving-voltage-signal terminal;
- the pixel driving circuit further comprising:
- a first control-signal terminal, wherein the first control-signal terminal is connected with the charge-voltage terminal, the control terminal of the first switch, a control terminal of the third switch, and a control terminal of the fourth switch, so as to control on/off of the first switch, the third switch, and the fourth switch;
- a second control-signal terminal, wherein the second control-signal terminal is connected with a control terminal of the second switch, so as to control on/off of the second switch;
- a fifth switch, a light-emitting diode and a negative voltage-signal terminal;
- wherein the light-emitting diode comprises a positive terminal and a negative terminal;
- the fifth switch is connected between the drain terminal and the positive terminal, so as to control on/off of the driving transistor and the light-emitting diode, and the negative terminal is connected with the negative voltage-signal terminal;
- a third control-signal terminal, wherein the third control-signal terminal is connected with a control terminal of the fifth switch, so as to control on/off of the fifth switch;
- wherein when the first control-signal terminal and the third control-signal terminal are loaded with a high-level signal, and the second control-signal terminal is loaded with a low-level signal, the potential of the charge-voltage terminal is at a high level, the second switch and the third switch are turned on, and the first switch, the fourth switch, and the fifth switch are turned off;
- and the gate terminal is connected with the reset-voltage-signal terminal via the second switch, the source terminal is connected with the driving-voltage-signal terminal via the third switch, so as to reset a potential of the gate terminal and a potential of the source terminal.