Interface devices and liquid crystal devices with the same

A liquid crystal device (LCD), comprising:

• an interface device comprises a first connector configured to receive low voltage differential signals (LVDS) provided for a left-half active area of the LCD, a second connector configured to receive the LVDS provided for a right-half active area of the LCD, and a third connector configured to receive operational voltage signals and control signals provided for the LCD;
• wherein the left-half active area comprises N number of left active areas along a direction from left to right in sequence, and each of the left active areas correspond to one left-positive-negative-pole-pin pair, the first connector comprises N number of left-positive-negative-pole-pin pairs, each of the left-positive-negative-pole-pin pairs comprises a first-left grounding pin, a left-positive-pole-pin and a left-negative-pole-pin, and the first-left grounding pin directly followed by the left-positive-pole-pin directly followed by the left-negative-pole-pin, each of the left-positive-pole-pins is configured to receive the positive LVDS provided for the corresponding left active area, and each of the left-negative-pole-pins is configured to receive the negative LVDS provided for the corresponding left active area;
• wherein the first connector further comprises at least one no-load (NC) pin before the N number of left-positive-negative-pole-pin pairs, and a second-left grounding pin after the N number of left-positive-negative-pole-pin pairs;
• and
• wherein the right-half active area comprises N number of right active areas along a direction from left to right in sequence, and each of the right active areas correspond to one right-positive-negative-pole-pin pair, the second connector comprises N number of right-positive-negative-pole-pin pairs, each of the right-positive-negative-pole-pin pairs comprises a first-right grounding pin, a right-positive-pole-pin and a right-negative-pole-pin, and the first-right grounding pin directly followed by the right-positive-pole-pin directly followed by the right-negative-pole-pin, each of the right-positive-pole-pins is configured to receive the positive LVDS provided for the corresponding right active area, and each of the right-negative-pole-pins is configured to receive the negative LVDS provided for the corresponding right active area.