System and method for electronic circuit design editing having adaptive visual indicia for relative current loading of circuit layout portions

A system for interactively editing an electronic circuit design defined by a plurality of electronic components interconnected at respective circuit nodes by a plurality of nets, having preemptive indication of relative current loading for one or more of the nets, the system comprising:

• a display visually rendering at least a part of the electronic circuit design to graphically represent a physical layout thereof;
• a graphic layout controller executed on a processor coupled to said display, said graphic layout controller including:
• an electrical awareness portion determining a magnitude of current loading at each of the circuit nodes interconnected by a selected one of the nets;
• an indicia scaling portion defining a gradation range for visual indicia of preselected type and mapping a range of magnitudes for the current loading of one or more circuit nodes of the selected net thereto, said indicia scaling portion defining alternative gradation ranges for circuit nodes depending on operation thereof as a current source or as a current sink;
• and,
• a graphic rendering portion adaptively displaying the visual indicia for at least one circuit node of the selected net superimposed on the displayed part of the electronic circuit design, the visual indicia for each said circuit node being graduated within the gradation range responsive to the magnitude of current loading determined therefor, the adaptively displayed visual indicia providing a reference for proportionately sizing a segment of the selected net terminating at the circuit node relative to another segment of the selected net within the physical layout;
• and,
• a user interface coupled to said display and graphic layout controller.

A method for interactively editing an electronic circuit design defined by a plurality of electronic components interconnected at respective circuit nodes by a plurality of nets, with preemptive indication of current loading for one or more of the nets, the method comprising:

• visually rendering on a display at least a part of the electronic circuit design to graphically represent a physical layout thereof;
• actuating a computer processor to execute a graphic layout controller implemented thereon, execution of said graphic layout controller including:
• determining a magnitude of current loading at one or more of the circuit nodes interconnected by a selected one of the nets;
• defining a gradation range for visual indicia of preselected type and mapping a range of magnitudes for the current loading of the one or more circuit nodes of the selected net thereto;
• adaptively rendering the visual indicia for at least one circuit node of the selected net concurrently with the displayed part of the electronic circuit design;
• and,
• graduating the visual indicia for said circuit node within the gradation range responsive to the magnitude of current loading determined therefor;
• establishing a user interface to said display and graphic layout controller;
• and,
• actuating said user interface to proportionately adjust at least one segment of the selected net in size relative to another segment of the selected net within the physical layout based on the adaptively rendered visual indicia.