System, method, and computer readable medium for walking pads: fast power- supply pad-placement optimization

A non-transitory computer readable medium storing a program causing a computer to execute a method for a physical processor design comprising the steps of:

• optimizing placement of a plurality of power pads in the power delivery network;
• and
• deriving an analytical model for describing a relationship between the maximum voltage drop and a number of the plurality of power pads determined based on the optimized placement of the plurality of power pads,
• wherein the optimizing identifies a plurality of grid locations with the power delivery network, at which the plurality of power pads are placed to minimize the maximum voltage drop,
• wherein the analytical model predicts a minimum number of required power pads and corresponding optimized locations of the plurality of power pads with a given maximum voltage drop budget,
• wherein in the analytical model, a load current density is not uniform, and each of the plurality of power pads serves an area around it in order to accelerate prediction of the minimum number of required power pads,
• wherein the optimizing step is a step of converting a global optimization problem into a local balance problem,
• wherein the global optimization problem is a placement of the plurality of power pads given a plurality of candidate locations within the power delivery network, and the local balance problem is a placement of a single power pad within the power delivery network,
• wherein the placement of the single power pad is based on virtual forces at the plurality of grid locations within the power delivery network,
• wherein the optimizing step configured to allow a subset of the plurality of power pads to move simultaneously in directions defined by normalized virtual forces imposed on them individually,
• wherein virtual forces are defined as a function of physical quantities of the power delivery network, which include current, voltage, temperature, and their gradients, to direct placement of the plurality of power pads, and
• wherein the processor is manufactured based on the optimized placement of the plurality of power pads and the derived analytical model to minimize the maximum voltage drop in the power delivery network.

An optimizing apparatus, for executing a minimization of a maximum voltage drop in a power delivery network, comprising:

• a processor configured to perform a method comprising the steps of:
• optimizing placement of a plurality of power pads in the power delivery network;
• and
• deriving an analytical model for describing a relationship between the maximum voltage drop and a number of the plurality of power pads determined based on the optimized placement of the plurality of power pads,
• wherein the optimizing identifies a plurality of grid locations with the power delivery network, at which the plurality of power pads are placed to minimize the maximum voltage drop,
• wherein the analytical model predicts a minimum number of required power pads and corresponding optimized locations of the plurality of power pads with a given maximum voltage drop budget,
• wherein in the analytical model, a load current density is not uniform, and each of the plurality of power pads serves an area around it in order to accelerate prediction of the minimum number of required power pads,
• wherein the optimizing step is a step of converting a global optimization problem into a local balance problem,
• wherein the global optimization problem is a placement of the plurality of power pads given a plurality of candidate locations within the power delivery network, and the local balance problem is a placement of a single power pad within the power delivery network,
• wherein the placement of the single power pad is based on virtual forces at the plurality of grid locations within the power delivery network,
• wherein the optimizing step configured to allow a subset of the plurality of power pads to move simultaneously in directions defined by normalized virtual forces imposed on them individually,
• wherein virtual forces are defined as a function of physical quantities of the power delivery network, which include current, voltage, temperature, and their gradients, to direct placement of the plurality of power pads, and
• wherein the processor is manufactured based on the optimized placement of the plurality of power pads and the derived analytical model to minimize the maximum voltage drop in the power delivery network;
• and
• a memory.