Arithmetic processing unit and method for controlling arithmetic processing unit

A method for controlling an arithmetic processing unit including:

• a memory access request issuance unit configured to issue a memory access request;
• and
• a cache including
• a cache memory including a tag memory and a data memory, states of data and data being registered in a block at an index that matches with matching an index of the memory access request inside the tag memory and the data memory,
• a move-in buffer control unit that issues a move-in request to register data of the memory access request in the cache when the memory access request causes a cache miss, and
• a plurality of move-in buffers each of which registers information of the move-in request,
• the method comprising:
• the move-in buffer control unit, in response to an input of the memory access request to which the cache miss occurs,
• (a) securing a vacant move-in buffer for the memory access request when judging that the vacant move-in buffer exists in the plurality of move-in buffers,
• (b) issuing a move-in request of the memory access request having secured the move-in buffer when judging that a move-in request having a same index as an index of the memory access request has not been registered in any of the plurality of move-in buffers,
• (c) issuing the move-in request of the memory access request having secured the move-in buffer when judging that the move-in request having the same index has been registered in any of the plurality of move-in buffers and further judging that all ways serving as replace ways have not been used by the move-in request having the same index that has been registered in any of the plurality of move-in buffers, and
• (d) releasing the secured move-in buffer and prevents an issuance of the move-in request when judging that all the ways have been used.