Back to results
US 10,481,990 B2Granted
Apparatuses and methods for a multiple master capable debug interface
AssigneeIntel Corporation
InventorsPatrik Eder, Rolf H. Kuehnis, Enrico D. Carrieri
Life of this patent
Estimating the term…
Abstract
Methods and apparatuses relating to a multiple master capable debug interface are described. In one embodiment, an apparatus includes a device circuit, a debug and test access port to debug and test the device circuit, and a switching circuit to switch a debug and test mastership between the debug and test access port and a data access port to the device circuit that is not dedicated to debug and test.
Claims24
An apparatus comprising:
- a device circuit;
- a debug and test access port to debug and test the device circuit;
- and
- a switching circuit to switch a debug and test mastership between the debug and test access port and a data access port to the device circuit that is not dedicated to debug and test.
1 more element
A method comprising:
- providing a device circuit and a debug and test access port to debug and test the device circuit;
- switching a debug and test mastership with a switching circuit between the debug and test access port and a data access port to the device circuit that is not dedicated to debug and test;
- and
- performing a debug and test operation on the device circuit.
1 more element
A computing system comprising:
- a plurality of devices;
- a debug network coupled between the plurality of devices and dedicated to debug and test, wherein each of the plurality of devices comprises an internal test and debug tool, and a debug and test access port coupled to the debug network;
- and
- a switching circuit to switch a debug and test mastership between:
- an internal test and debug tool of a first device of the plurality of devices and couple the internal test and debug tool of the first device to all other devices of the plurality of devices through the debug and test access port of the first device, and
- an internal test and debug tool of a second device of the plurality of devices and couple the internal test and debug tool of the second device to all other devices of the plurality of devices through the debug and test access port of the second device.
3 more elements
Dependencies are inferred from the claim text.