Architecture for asynchronous memory transfer for kernels implemented in integrated circuits

An integrated circuit having a hardware architecture for a kernel, wherein the hardware architecture comprises:

• a shared memory circuit configured to implement a buffer of the kernel;
• a memory access circuit configured to perform memory access operations of the kernel, wherein the memory access operations comprise read operations and write operations that exchange data between a global memory and the shared memory;
• and
• an execution circuit coupled to the memory access circuit and configured to perform work operations of the kernel using the data stored in the shared memory.

A system for implementing a kernel as circuitry in an integrated circuit, comprising:

• a memory configured to store program code;
• and
• a processor coupled to the memory, wherein the processor, in response to executing the program code, is configured to initiate operations including:
• determining memory access operations and work operations from kernel program code;
• and
• generating a circuit design from the kernel program code, wherein the circuit design implements a circuit architecture having a memory access circuit configured to perform the memory access operations and an execution circuit configured to perform the work operations concurrently with the memory access operations.