Signal control for segmented modulators
AssigneeHewlett Packard Enterprise Development LP
InventorsNan Qi, Cheng Li, Marco Fiorentino
Life of this patent
Estimating the term…
Abstract
In example implementations, an apparatus includes a serializer, a re-timing buffer coupled to the serializer, and a plurality of segments coupled to the re-timing buffer. The plurality of segments may be used for controlling a timing of an electrical signal. Each one of the plurality of segments may include a segment serializer, a timing control coupled to the segment serializer and a driver coupled to the timing control. In addition, a phase clock may be coupled to the segment serializer and the timing control of each one of the plurality of segments.
Claims15
An apparatus, comprising:
- a serializer;
- a re-timing buffer coupled to the serializer;
- a plurality of segments coupled to the re-timing buffer, wherein the plurality of segments is for controlling a timing of an electrical signal, wherein each one of the plurality of segments comprises:
- a segment serializer;
- a timing control coupled to the segment serializer;
- and
- a driver coupled to the timing control;
- and
- a phase clock coupled to the segment serializer and the timing control of each one of the plurality of segments.
A Mach Zehnder Modulator (MZM) driver, comprising:
- a first multiplexer for serializing first two quarter rates of an electrical signal into a first half rate of the electrical signal;
- a second multiplexer for serializing second two quarter rates of the electrical signal into a second half rate the electrical signal;
- a delay coupled to the second multiplexer;
- a plurality of timing delay segments receiving the first half rate and the second half rate for controlling a timing of the electrical signal;
- and
- a phase clock having a plurality of different phase lines coupled to each one of the plurality of timing delay segments.
A method, comprising:
- transmitting a first half rate of an electrical signal to each one of a plurality of timing delay segments;
- transmitting a second half rate of the electrical signal to the each one of the plurality of timing delay segments;
- serializing the first half rate and the second half rate into a full rate of the electrical signal in the each one of the plurality of timing delay segments;
- and
- controlling the full rate of the electrical signal by adding a different time delay via a phase clock to the full rate of the electrical signal in the each one of the plurality of timing delay segments.
Dependencies are inferred from the claim text.