Method for manufacturing a multi-layer circuit board capable of being applied with electrical testing

A manufacturing method for a multi-layer circuit board capable of being applied with electrical testing, the method comprising:

• providing a first loading plate, wherein the first loading plate comprises a substrate, a conductive layer, and a metal interface layer, the conductive layer and the metal interface layer are sequentially overlapping on the substrate, a bottom surface of the metal interface layer is detachably connected to the conductive layer, and the metal interface layer is conductive;
• forming a second loading plate overlapping on the metal interface layer by electroplating the first loading plate, wherein the second loading plate has a first side and a second side opposite to the first side, the second side is connected to a top surface of the metal interface layer;
• forming a first patterned photoresist layer overlapping on the first side of the second loading plate;
• forming a conductive corrosion-barrier layer and an electrical connection layer sequentially on the first side of the second loading plate by electroplating the second loading plate, wherein the conductive corrosion-barrier layer is conductive, and the conductive corrosion-barrier layer is connected between the electrical connection layer and the second loading plate;
• removing the first patterned photoresist layer;
• disposing a bottom dielectric layer on the first side of the second loading plate and the electrical connection layer to enclose the electrical connection layer and the conductive corrosion-barrier layer;
• forming a multi-layer circuit structure on the bottom dielectric layer, wherein the multi-layer circuit structure comprises a bottom-layer circuit, a top dielectric layer, and a top-layer circuit, the bottom-layer circuit is overlapping on the bottom dielectric layer and is connected to the electrical connection layer, the top dielectric layer is on a top side of the bottom-layer circuit, the top-layer circuit is on a top surface of the top dielectric layer and electrically connected to the bottom-layer circuit;
• forming a second patterned photoresist layer enclosing the top-layer circuit and covering the top dielectric layer, and peeling off the substrate and the conductive layer;
• forming a third patterned photoresist layer on the bottom surface of the metal interface layer;
• etching the metal interface layer and the second loading plate to obtain a patterned metal interface layer and a delivery loading plate, wherein the patterned metal interface layer is connected between the third patterned photoresist layer and the delivery loading plate, the delivery loading plate is connected between the bottom dielectric layer and the patterned metal interface layer, and wherein the third patterned photoresist layer, the delivery loading plate, and the patterned metal interface layer expose the conductive corrosion-barrier layer;
• and
• removing the second patterned photoresist layer and the third patterned photoresist layer to obtain the multi-layer circuit board.