Multi-standard transmitter architecture with digital upconvert stage and gallium nitride (GAN) amplifier circuit

A method for digitally upconverting an intermediate frequency (IF) signal, the method comprising:

• receiving a first outphased signal (VI) and a second outphased signal (VQ),
• multiplying the first outphased signal (VI) with a first multi-level digital clock signal (LOI(t)) to provide a first digitally upconverted signal at a first carrier frequency;
• and
• multiplying the second outphased signal (VQ) with a second multi-level digital clock signal (LOI(q)) to provide a second digitally upconverted signal at the first carrier frequency;
• wherein the first and second multi-level digital clock signals each comprise signal levels of −1V, 0V, and +1V.

A transmitter system comprising:

• an output stage comprising:
• a Gallium Nitride (GaN) power amplifier (PA) circuit having a Modified Current Mode Class-D (CMCD) configuration, the GaN PA circuit including:
• a lower switching device electrically coupled to an input to receive an input RF signal;
• an upper switching device to switchably couple the first switching device to a power supply to drive an antenna circuit based on the input RF signal;
• and
• wherein the lower and upper switching devices form a first transistor cascode arrangement;
• and
• wherein the upper switching device of the first cascode transistor arrangement is 1.22±0.2 millimeters wide.

A transmitter system comprising:

• an output stage comprising:
• a Gallium Nitride (GaN) power amplifier (PA) circuit having a Modified Current Mode Class-D (CMCD) configuration, the GaN PA circuit including:
• a lower switching device electrically coupled to an input to receive an input RF signal;
• an upper switching device to switchably couple the first switching device to a power supply to drive an antenna circuit based on the input RF signal;
• and
• wherein the lower and upper switching devices form a first transistor cascode arrangement;
• and
• wherein the GaN PA circuit includes a second cascode transistor arrangement, the first and second cascode switching arrangements forming an inverse CMCD configuration.

A transmitter system comprising:

• an output stage comprising:
• a Gallium Nitride (GaN) power amplifier (PA) circuit having a Modified Current Mode Class-D (CMCD) configuration, the GaN PA circuit including:
• a lower switching device electrically coupled to an input to receive an input RF signal;
• an upper switching device to switchably couple the first switching device to a power supply to drive an antenna circuit based on the input RF signal;
• and
• wherein the lower and upper switching devices form a first transistor cascode arrangement;
• wherein the output stage further comprises a two-stage driver circuit, the two-stage driver circuit comprising:
• a first stage to receive a digital outphased intermediate frequency (IF) signal and generate a driving signal based on the digital outphased IF signal;
• a second stage comprising an inverter circuit to couple to the input of the GaN PA circuit and drive the GaN PA circuit based on the driving signal;
• and
• wherein the driving signal provides a 0 to VDD swing sufficient to switch on the lower switching device of the first cascode transistor arrangement.